From nobody Fri Dec 19 10:47:38 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E0D5A1D362E; Tue, 2 Jul 2024 19:24:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719948262; cv=none; b=MFRbquYm8SYfLhg8Zft8vyTlpw/MpgFeeBXKtu6tv+B+HmF2hO6PlaGx+PFQpe4jhMp1orVp9cDgMzUSiONQ//EWW42EeJgXKa6HfWlstTBpjLCp73Ba6bnkPcnEnxARVfSxwpJLCM+R/dnL2fKwHW5puFqCnuJtIBrrm0lyMCQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719948262; c=relaxed/simple; bh=5pXwVnLjrZZMmclVCPJIpOv8/3X5iL9fXTUooTWkdYU=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=CBeJldpUumITSW3TIZ92bXbkWy8a0OmN7txQ+J3Wn0BpXEMrbPz3XcwL92TBHKODKZJVzDa3lAdVipfRcyRiWixvM3j7K9w3DPdvkdRrhIZpgNAGRg9JLx4IaKBrapeKWTSkeskZ95hC48dgY6yTyA8J48aqYDJ5Evu8TuK7gVM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=XR0bkZd7; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=Z0RmLmyt; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="XR0bkZd7"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="Z0RmLmyt" Date: Tue, 02 Jul 2024 19:24:17 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1719948257; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=vWsTkYXYPLUXZS78PWvCCQVM73KomW/BuIRsc/vDrsc=; b=XR0bkZd7KTgUhvoFF0PuLdK95ve+ksy2Nxn28XyEcLn6kYi+v56cp0xiNduoNzdJZgMEtM 1lqnbb+6ZMIuwVQdynelCdDk8Oa15RrBy2W3hey1LZFKzsdNWvlNwh11V2VBu8Viz60Nr3 4rEWn8BoDVPl1YE6Vu3SPNp1Xhxk30zpltBcmwq19Ed/rbWE0fnULJY/SrhOndSlkyNwJH /NLZkj7ZjBroU1RXwpAyjtYqaMbH2s8HCeYORH9FQcBeN8LTlaoAXIh0M70Zw14pCsmdQB Y4XfxQf1LXAVzSgenGXF8dFD85R2JxkLTbiwDRZ5YjtoSBX3HK7CnGQhgwys3A== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1719948257; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=vWsTkYXYPLUXZS78PWvCCQVM73KomW/BuIRsc/vDrsc=; b=Z0RmLmytdEOl9Ecghk5LjI8xi9/SsPaiYFbiOEO6JHat11+9A/T5Jcl29O1m6PUeDdMLu8 YpMyYvtWb6aovkCg== From: "tip-bot2 for Tony Luck" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/cache] x86/resctrl: Prepare for new domain scope Cc: Tony Luck , "Borislav Petkov (AMD)" , Reinette Chatre , Babu Moger , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20240628215619.76401-2-tony.luck@intel.com> References: <20240628215619.76401-2-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <171994825740.2215.14130200743347651330.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/cache branch of tip: Commit-ID: f436cb6913a57bf3e1e66d18bc663e6c20751929 Gitweb: https://git.kernel.org/tip/f436cb6913a57bf3e1e66d18bc663e6c2= 0751929 Author: Tony Luck AuthorDate: Fri, 28 Jun 2024 14:56:01 -07:00 Committer: Borislav Petkov (AMD) CommitterDate: Tue, 02 Jul 2024 19:49:53 +02:00 x86/resctrl: Prepare for new domain scope Resctrl resources operate on subsets of CPUs in the system with the defining attribute of each subset being an instance of a particular level of cache. E.g. all CPUs sharing an L3 cache would be part of the same domain. In preparation for features that are scoped at the NUMA node level, change the code from explicit references to "cache_level" to a more generic scope. At this point the only options for this scope are groups of CPUs that share an L2 cache or L3 cache. Clean up the error handling when looking up domains. Report invalid ids before calling rdt_find_domain() in preparation for better messages when scope can be other than cache scope. This means that rdt_find_domain() will never return an error. So remove checks for error from the call sites. Signed-off-by: Tony Luck Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Reinette Chatre Tested-by: Babu Moger Link: https://lore.kernel.org/r/20240628215619.76401-2-tony.luck@intel.com --- arch/x86/kernel/cpu/resctrl/core.c | 46 +++++++++++++++------- arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 2 +- arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 6 ++- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 5 +- include/linux/resctrl.h | 9 +++- 5 files changed, 49 insertions(+), 19 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index a113d9a..f85b2ff 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -68,7 +68,7 @@ struct rdt_hw_resource rdt_resources_all[] =3D { .r_resctrl =3D { .rid =3D RDT_RESOURCE_L3, .name =3D "L3", - .cache_level =3D 3, + .scope =3D RESCTRL_L3_CACHE, .domains =3D domain_init(RDT_RESOURCE_L3), .parse_ctrlval =3D parse_cbm, .format_str =3D "%d=3D%0*x", @@ -82,7 +82,7 @@ struct rdt_hw_resource rdt_resources_all[] =3D { .r_resctrl =3D { .rid =3D RDT_RESOURCE_L2, .name =3D "L2", - .cache_level =3D 2, + .scope =3D RESCTRL_L2_CACHE, .domains =3D domain_init(RDT_RESOURCE_L2), .parse_ctrlval =3D parse_cbm, .format_str =3D "%d=3D%0*x", @@ -96,7 +96,7 @@ struct rdt_hw_resource rdt_resources_all[] =3D { .r_resctrl =3D { .rid =3D RDT_RESOURCE_MBA, .name =3D "MB", - .cache_level =3D 3, + .scope =3D RESCTRL_L3_CACHE, .domains =3D domain_init(RDT_RESOURCE_MBA), .parse_ctrlval =3D parse_bw, .format_str =3D "%d=3D%*u", @@ -108,7 +108,7 @@ struct rdt_hw_resource rdt_resources_all[] =3D { .r_resctrl =3D { .rid =3D RDT_RESOURCE_SMBA, .name =3D "SMBA", - .cache_level =3D 3, + .scope =3D RESCTRL_L3_CACHE, .domains =3D domain_init(RDT_RESOURCE_SMBA), .parse_ctrlval =3D parse_bw, .format_str =3D "%d=3D%*u", @@ -392,9 +392,6 @@ struct rdt_domain *rdt_find_domain(struct rdt_resource = *r, int id, struct rdt_domain *d; struct list_head *l; =20 - if (id < 0) - return ERR_PTR(-ENODEV); - list_for_each(l, &r->domains) { d =3D list_entry(l, struct rdt_domain, list); /* When id is found, return its domain. */ @@ -484,6 +481,19 @@ static int arch_domain_mbm_alloc(u32 num_rmid, struct = rdt_hw_domain *hw_dom) return 0; } =20 +static int get_domain_id_from_scope(int cpu, enum resctrl_scope scope) +{ + switch (scope) { + case RESCTRL_L2_CACHE: + case RESCTRL_L3_CACHE: + return get_cpu_cacheinfo_id(cpu, scope); + default: + break; + } + + return -EINVAL; +} + /* * domain_add_cpu - Add a cpu to a resource's domain list. * @@ -499,7 +509,7 @@ static int arch_domain_mbm_alloc(u32 num_rmid, struct r= dt_hw_domain *hw_dom) */ static void domain_add_cpu(int cpu, struct rdt_resource *r) { - int id =3D get_cpu_cacheinfo_id(cpu, r->cache_level); + int id =3D get_domain_id_from_scope(cpu, r->scope); struct list_head *add_pos =3D NULL; struct rdt_hw_domain *hw_dom; struct rdt_domain *d; @@ -507,12 +517,14 @@ static void domain_add_cpu(int cpu, struct rdt_resour= ce *r) =20 lockdep_assert_held(&domain_list_lock); =20 - d =3D rdt_find_domain(r, id, &add_pos); - if (IS_ERR(d)) { - pr_warn("Couldn't find cache id for CPU %d\n", cpu); + if (id < 0) { + pr_warn_once("Can't find domain id for CPU:%d scope:%d for resource %s\n= ", + cpu, r->scope, r->name); return; } =20 + d =3D rdt_find_domain(r, id, &add_pos); + if (d) { cpumask_set_cpu(cpu, &d->cpu_mask); if (r->cache.arch_has_per_cpu_cfg) @@ -552,15 +564,21 @@ static void domain_add_cpu(int cpu, struct rdt_resour= ce *r) =20 static void domain_remove_cpu(int cpu, struct rdt_resource *r) { - int id =3D get_cpu_cacheinfo_id(cpu, r->cache_level); + int id =3D get_domain_id_from_scope(cpu, r->scope); struct rdt_hw_domain *hw_dom; struct rdt_domain *d; =20 lockdep_assert_held(&domain_list_lock); =20 + if (id < 0) { + pr_warn_once("Can't find domain id for CPU:%d scope:%d for resource %s\n= ", + cpu, r->scope, r->name); + return; + } + d =3D rdt_find_domain(r, id, NULL); - if (IS_ERR_OR_NULL(d)) { - pr_warn("Couldn't find cache id for CPU %d\n", cpu); + if (!d) { + pr_warn("Couldn't find domain with id=3D%d for CPU %d\n", id, cpu); return; } hw_dom =3D resctrl_to_arch_dom(d); diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cp= u/resctrl/ctrlmondata.c index b7291f6..2bf021d 100644 --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c @@ -577,7 +577,7 @@ int rdtgroup_mondata_show(struct seq_file *m, void *arg) =20 r =3D &rdt_resources_all[resid].r_resctrl; d =3D rdt_find_domain(r, domid, NULL); - if (IS_ERR_OR_NULL(d)) { + if (!d) { ret =3D -ENOENT; goto out; } diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cp= u/resctrl/pseudo_lock.c index 1bbfd3c..201011f 100644 --- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c +++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c @@ -292,9 +292,13 @@ static void pseudo_lock_region_clear(struct pseudo_loc= k_region *plr) */ static int pseudo_lock_region_init(struct pseudo_lock_region *plr) { + enum resctrl_scope scope =3D plr->s->res->scope; struct cacheinfo *ci; int ret; =20 + if (WARN_ON_ONCE(scope !=3D RESCTRL_L2_CACHE && scope !=3D RESCTRL_L3_CAC= HE)) + return -ENODEV; + /* Pick the first cpu we find that is associated with the cache. */ plr->cpu =3D cpumask_first(&plr->d->cpu_mask); =20 @@ -305,7 +309,7 @@ static int pseudo_lock_region_init(struct pseudo_lock_r= egion *plr) goto out_region; } =20 - ci =3D get_cpu_cacheinfo_level(plr->cpu, plr->s->res->cache_level); + ci =3D get_cpu_cacheinfo_level(plr->cpu, scope); if (ci) { plr->line_size =3D ci->coherency_line_size; plr->size =3D rdtgroup_cbm_to_size(plr->s->res, plr->d, plr->cbm); diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index cb68a12..50f5876 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1454,8 +1454,11 @@ unsigned int rdtgroup_cbm_to_size(struct rdt_resourc= e *r, struct cacheinfo *ci; int num_b; =20 + if (WARN_ON_ONCE(r->scope !=3D RESCTRL_L2_CACHE && r->scope !=3D RESCTRL_= L3_CACHE)) + return size; + num_b =3D bitmap_weight(&cbm, r->cache.cbm_len); - ci =3D get_cpu_cacheinfo_level(cpumask_any(&d->cpu_mask), r->cache_level); + ci =3D get_cpu_cacheinfo_level(cpumask_any(&d->cpu_mask), r->scope); if (ci) size =3D ci->size / r->cache.cbm_len * num_b; =20 diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index a365f67..ed693bf 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -150,13 +150,18 @@ struct resctrl_membw { struct rdt_parse_data; struct resctrl_schema; =20 +enum resctrl_scope { + RESCTRL_L2_CACHE =3D 2, + RESCTRL_L3_CACHE =3D 3, +}; + /** * struct rdt_resource - attributes of a resctrl resource * @rid: The index of the resource * @alloc_capable: Is allocation available on this machine * @mon_capable: Is monitor feature available on this machine * @num_rmid: Number of RMIDs available - * @cache_level: Which cache level defines scope of this resource + * @scope: Scope of this resource * @cache: Cache allocation related data * @membw: If the component has bandwidth controls, their properties. * @domains: RCU list of all domains for this resource @@ -174,7 +179,7 @@ struct rdt_resource { bool alloc_capable; bool mon_capable; int num_rmid; - int cache_level; + enum resctrl_scope scope; struct resctrl_cache cache; struct resctrl_membw membw; struct list_head domains;