From nobody Sun May 19 15:29:25 2024 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 706A616D9D7; Fri, 26 Apr 2024 18:12:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714155134; cv=none; b=gWFxjkL9xubEvvfGHBzdae+0WY01U7AFr+Hh2l/AZWTy42ZQ4sHh+++hOuEnHTlYjeWKMfpS7o3DJvXQkvzzY1gUOs+Z/wujBUZs/GiUpGyFkYIemFwt415zFCb/loBNVRhv+gu/LJ2Cc1IEQd2MHp6b73rIYcYbKLL8bdpzv3I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714155134; c=relaxed/simple; bh=FQ5KINAWkUbd+/P2Z1gHyl8xUM62kP5PAmjNgDx+sVE=; h=Date:From:To:Subject:Cc:MIME-Version:Message-ID:Content-Type; b=Xl8feOhnaGPKQu6DeXhfKqpzzRoN0dF86pOcobI6EmYtC6ys5lr+NbuermmVWvnj1dvDkEgC+NXfys5qDv3DvpTRn0UqpqiY2ZYCY+Y6mDXrzgyM/60Lw468YyM9i+2/oeh7Ww6ACxxOD1cHWRrefTH9oAWKckHQBEpzJEZZ3pY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=UCjknnhk; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=qjNO/4og; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="UCjknnhk"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="qjNO/4og" Date: Fri, 26 Apr 2024 18:12:10 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1714155130; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=5xpVfkDVf/WAGRkbHASodmfQMAhYF9grSX6euUbCswQ=; b=UCjknnhke4jU5N4X7IMoau2496p6DZzCSR3jVxcIxkzIl4sndgR9Z/hDbXtjPHV88UT347 kC6o0hPu7tXFUpUNjjz/dL0zRlsC+OLGKzk+62XVjyef8+EkV4RtsuiAv2vouWtwmxVDd4 s9qnBi74rxux7PHKUl0nrPLptC/nTs8yLc0aWpC1A6zGbuelwEkSFFDTlUoO+HuP9DqcEf I1Yi9xLgsUPcIvrv93Q4myG2viSeQMdlCK8lR2ky1b6ciPEJ04mT8CS7AQjyz+wDZiHOSx Kusw/MWkPGs+yBiKoCJYtuGZwe4xSLOZvq06fC9+whNIyeyiWkQhT1/Vqe2bCQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1714155130; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=5xpVfkDVf/WAGRkbHASodmfQMAhYF9grSX6euUbCswQ=; b=qjNO/4ogEO14Kp7Yg8eLexGjbfqb1w4m0kmNH1vd8RQGtTsmoWl8ZIasC2/j6/jT7kvDJ+ hsCUPQ2IubsK0JDA== From: "tip-bot2 for Tony Luck" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/cpu] x86/tsc_msr: Switch to new Intel CPU model defines Cc: Tony Luck , Dave Hansen , x86@kernel.org, linux-kernel@vger.kernel.org Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <171415513047.10875.12574768502379965400.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/cpu branch of tip: Commit-ID: 94eb882e95755e8582fb4961090e09ba2973689c Gitweb: https://git.kernel.org/tip/94eb882e95755e8582fb4961090e09ba2= 973689c Author: Tony Luck AuthorDate: Wed, 24 Apr 2024 11:15:18 -07:00 Committer: Dave Hansen CommitterDate: Fri, 26 Apr 2024 09:11:39 -07:00 x86/tsc_msr: Switch to new Intel CPU model defines New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Signed-off-by: Dave Hansen Link: https://lore.kernel.org/all/20240424181518.41927-1-tony.luck%40intel.= com --- arch/x86/kernel/tsc_msr.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c index 6555a85..deeb028 100644 --- a/arch/x86/kernel/tsc_msr.c +++ b/arch/x86/kernel/tsc_msr.c @@ -147,13 +147,13 @@ static const struct freq_desc freq_desc_lgm =3D { }; =20 static const struct x86_cpu_id tsc_msr_cpu_ids[] =3D { - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_MID, &freq_desc_pnw), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_TABLET,&freq_desc_clv), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, &freq_desc_byt), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &freq_desc_tng), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, &freq_desc_cht), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT_MID, &freq_desc_ann), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT_NP, &freq_desc_lgm), + X86_MATCH_VFM(INTEL_ATOM_SALTWELL_MID, &freq_desc_pnw), + X86_MATCH_VFM(INTEL_ATOM_SALTWELL_TABLET, &freq_desc_clv), + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT, &freq_desc_byt), + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, &freq_desc_tng), + X86_MATCH_VFM(INTEL_ATOM_AIRMONT, &freq_desc_cht), + X86_MATCH_VFM(INTEL_ATOM_AIRMONT_MID, &freq_desc_ann), + X86_MATCH_VFM(INTEL_ATOM_AIRMONT_NP, &freq_desc_lgm), {} };