From nobody Sat Feb 7 05:49:14 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 30A2A7F7CC; Mon, 8 Apr 2024 13:10:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712581845; cv=none; b=PQf2QS6tnBSAQss4x2RhF0wdpcFSIBWq6mAVusaHvXh0aDfVvwlBQ25MFcVVjVOCD/55L59CrsZ2MiRkq5bZ0GnD1fLPhuX7hBR1F1i2AZqwQImKiiG2xY4fjlmCC4nXN6SJWGS6UidLVPQ3dCMWoiRoS9y4hcixPKXwQ3PK/Tw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712581845; c=relaxed/simple; bh=3q4123uQGG1fwT9H9eSc/cxVrgCoZKaghNv6uu19/S4=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=a6azRuRIkKCVqtbeKWPVicXpQkR/WlA+BnmA4eP1stsQoj8rFh2AgIXQaoLgrGY6E05deNuAHwLVBH1+zCWSGaY/xOZaign9gWzrIHLhQG1ks5l0WeOe21F7hanyrFSl1dQAisFROv8ICpQt4sZjIEMpxl41WbiWTspI3pXfte8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=aTdsMSPq; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=CjnCLVKK; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="aTdsMSPq"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="CjnCLVKK" Date: Mon, 08 Apr 2024 13:10:41 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1712581842; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5lQFP+4wxGPaY8SWfl9yDYmAHq4BLgJQ45MqZV0OwTA=; b=aTdsMSPq6GUJwl90aUyzmvmDpy8lNwga6BwZPAfgSzRP6UJZIEh64Mwm+v4FY1ofBnZKje bL3GcVfyF7MrfqpSk8NHcqFqIURjzpLQj8bcoGjNelIIIt/7pceig3/NZUUKoXYekXjhdr 7jxS/OiiQl16A4HMdwyxsX+lhCkOgU+Oxow5Jldi+Wzb8bUNPWkQlqJoQ4Ytg8P6shK9eB YOzOceE05tEl+R6hIm2uCTCxlbeLI3oP3pk2a6FTV6MTk0oKFkTY9Gsgp1zurJ5295q0T2 4+cvRJlB8Kr+oyZeHjkepjflImVR5S7ZR/ThqxMApANsEGMM6DQiFPZ418dvJA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1712581842; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5lQFP+4wxGPaY8SWfl9yDYmAHq4BLgJQ45MqZV0OwTA=; b=CjnCLVKKIE/ifNsIVBBEOlIdYmtUfWpIL92wqfckVNIprxoYhRL/9rukekMjnjJyyn4tHz L2Jz6pGV6iZDOJBQ== From: "tip-bot2 for Adrian Hunter" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: timers/core] vdso, math64: Provide mul_u64_u32_add_u64_shr() Cc: Adrian Hunter , Thomas Gleixner , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20240325064023.2997-6-adrian.hunter@intel.com> References: <20240325064023.2997-6-adrian.hunter@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <171258184187.10875.16271014936581417028.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the timers/core branch of tip: Commit-ID: 1beb35ec615f676d49d68b6dc23c7418ba8ff145 Gitweb: https://git.kernel.org/tip/1beb35ec615f676d49d68b6dc23c7418b= a8ff145 Author: Adrian Hunter AuthorDate: Mon, 25 Mar 2024 08:40:09 +02:00 Committer: Thomas Gleixner CommitterDate: Mon, 08 Apr 2024 15:03:07 +02:00 vdso, math64: Provide mul_u64_u32_add_u64_shr() Provide mul_u64_u32_add_u64_shr() which is a calculation that will be used by timekeeping and VDSO. Place #include after #include to allow architecture-specific overrides, at least for the kernel. Signed-off-by: Adrian Hunter Signed-off-by: Thomas Gleixner Link: https://lore.kernel.org/r/20240325064023.2997-6-adrian.hunter@intel.c= om --- include/linux/math64.h | 2 +- include/vdso/math64.h | 38 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 39 insertions(+), 1 deletion(-) diff --git a/include/linux/math64.h b/include/linux/math64.h index fd13622..d34def7 100644 --- a/include/linux/math64.h +++ b/include/linux/math64.h @@ -4,8 +4,8 @@ =20 #include #include -#include #include +#include =20 #if BITS_PER_LONG =3D=3D 64 =20 diff --git a/include/vdso/math64.h b/include/vdso/math64.h index 7da703e..22ae212 100644 --- a/include/vdso/math64.h +++ b/include/vdso/math64.h @@ -21,4 +21,42 @@ __iter_div_u64_rem(u64 dividend, u32 divisor, u64 *remai= nder) return ret; } =20 +#if defined(CONFIG_ARCH_SUPPORTS_INT128) && defined(__SIZEOF_INT128__) + +#ifndef mul_u64_u32_add_u64_shr +static __always_inline u64 mul_u64_u32_add_u64_shr(u64 a, u32 mul, u64 b, = unsigned int shift) +{ + return (u64)((((unsigned __int128)a * mul) + b) >> shift); +} +#endif /* mul_u64_u32_add_u64_shr */ + +#else + +#ifndef mul_u64_u32_add_u64_shr +#ifndef mul_u32_u32 +static inline u64 mul_u32_u32(u32 a, u32 b) +{ + return (u64)a * b; +} +#define mul_u32_u32 mul_u32_u32 +#endif +static __always_inline u64 mul_u64_u32_add_u64_shr(u64 a, u32 mul, u64 b, = unsigned int shift) +{ + u32 ah =3D a >> 32, al =3D a; + bool ovf; + u64 ret; + + ovf =3D __builtin_add_overflow(mul_u32_u32(al, mul), b, &ret); + ret >>=3D shift; + if (ovf && shift) + ret +=3D 1ULL << (64 - shift); + if (ah) + ret +=3D mul_u32_u32(ah, mul) << (32 - shift); + + return ret; +} +#endif /* mul_u64_u32_add_u64_shr */ + +#endif + #endif /* __VDSO_MATH64_H */