From nobody Sun Feb 8 19:25:04 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D4AD13F9E7; Fri, 22 Mar 2024 10:59:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711105165; cv=none; b=lOEiZSSBJm+fVZiBwpRw/fTIj5p+sHNwErVWmYoeqYE3r4DDVTHPmo/+MDmsVB6JNiZSAVFAesZqrKN0QqIpoEIFOiDyIWbF5sAZDKwdhoyEYigK175FpRhjNe9H6YCwAVWdIaf1MQK3i7z3QloGPdOr4nHitCCCSkNlzGwu+XM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711105165; c=relaxed/simple; bh=6y0SKQP3yg6vtCvcWYd+vp+JKLb8VWhaYpIGqyabjVU=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=m6NxfVR1aIQZaKIy/F73cYQg4THyWr8mB1F/FhRC1UCtDqcrA5Gw6wmjCi9maWWpgGjie9yj8DYgKiqHAgu8eAspjd2wL4uUQCFODNwaHtOf6AfeHbVbNfZ4I7CPmCFhm3NDXquM3pDaH7WVI11KleH7DcAX15NQKdV2t08LyZY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=vGe67JcL; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=kGrOyUqt; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="vGe67JcL"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="kGrOyUqt" Date: Fri, 22 Mar 2024 10:59:21 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1711105162; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=3vEhqtTPlY1TvYFcXQO0SZFnOE9PzEWsix7+imOWO1w=; b=vGe67JcLFJCYQqmooohRfmyHainVE5yfJ5xnTU36TY4u+33OzzVs9ZksFT2lTwdClQr6/j qCOjbwmHtbjvZ9Z8+9Az9YC11olegr6rO1jmkvi3Eyl3DOLroAhrQs6pMWKF0cT3kywYC0 R0Rsit1KdnrYFPVjznZlupfi4vBZ8g6TGYmCoG+7DBIgvfWH1NAfStKclpmZifIdmstsCj M1qSVRBA1k0CaIqGswPn36ks+FMADE2wPwGOdgZwAgIJ4wxEvy2xPDD/cK+jStd0xcfb25 gOrtVahBZH48mzj76l5qPB/Vhbr7tHHoekoDupkMiKWMei3vJ1kuh5E4tvyxpQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1711105162; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=3vEhqtTPlY1TvYFcXQO0SZFnOE9PzEWsix7+imOWO1w=; b=kGrOyUqti5y5HY78ZYmB4cI3qKJXRR4hzafY8qBVkqRJKIiPAaydopSiiNb7ajx95xZKss 05/huNv6NCuFA0Bg== From: "tip-bot2 for Alexey Dobriyan" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/asm] x86/asm/64: Clean up memset16(), memset32(), memset64() assembly constraints in Cc: Alexey Dobriyan , Ingo Molnar , Uros Bizjak , Linus Torvalds , Andy Lutomirski , "H. Peter Anvin" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20240314165715.31831-1-adobriyan@gmail.com> References: <20240314165715.31831-1-adobriyan@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <171110516145.10875.12682506155345317874.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/asm branch of tip: Commit-ID: 4c9a93800121e90484cd07c8e5bde70e31cdb996 Gitweb: https://git.kernel.org/tip/4c9a93800121e90484cd07c8e5bde70e3= 1cdb996 Author: Alexey Dobriyan AuthorDate: Thu, 14 Mar 2024 19:57:15 +03:00 Committer: Ingo Molnar CommitterDate: Fri, 22 Mar 2024 11:47:34 +01:00 x86/asm/64: Clean up memset16(), memset32(), memset64() assembly constraint= s in - Use "+" constraint modifier, simplify inputs and output lists, delete dummy variables with meaningless names, "&" only makes sense in complex assembly creating constraints on intermediate registers. But 1 instruction assemblies don't have inner body so to speak. - Write "rep stos*" on one line: Rep prefix is integral part of x86 instruction. I'm not sure why people separate "rep" with newline. Uros Bizjak adds context: "some archaic assemblers rejected 'rep insn' on one line. I have checked that the minimum required binutils-2.25 assembles this without problems." - Use __auto_type for maximum copy pasta experience, - Reformat a bit to make everything looks nicer. Note that "memory" clobber is too much if "n" is known at compile time. However, "=3Dm" (*(T(*)[n])s) doesn't work because -Wvla even if "n" is compile time constant: if (BCP(n)) { rep stos : "=3Dm" (*(T(*)[n])s) } else { rep stosw : "memory" } The above doesn't work. Signed-off-by: Alexey Dobriyan Signed-off-by: Ingo Molnar Reviewed-by: Uros Bizjak Cc: Linus Torvalds Cc: Andy Lutomirski Cc: "H. Peter Anvin" Link: https://lore.kernel.org/r/20240314165715.31831-1-adobriyan@gmail.com --- arch/x86/include/asm/string_64.h | 45 ++++++++++++++++--------------- 1 file changed, 24 insertions(+), 21 deletions(-) diff --git a/arch/x86/include/asm/string_64.h b/arch/x86/include/asm/string= _64.h index 857d364..9d0b324 100644 --- a/arch/x86/include/asm/string_64.h +++ b/arch/x86/include/asm/string_64.h @@ -30,37 +30,40 @@ void *__memset(void *s, int c, size_t n); #define __HAVE_ARCH_MEMSET16 static inline void *memset16(uint16_t *s, uint16_t v, size_t n) { - long d0, d1; - asm volatile("rep\n\t" - "stosw" - : "=3D&c" (d0), "=3D&D" (d1) - : "a" (v), "1" (s), "0" (n) - : "memory"); - return s; + const __auto_type s0 =3D s; + asm volatile ( + "rep stosw" + : "+D" (s), "+c" (n) + : "a" (v) + : "memory" + ); + return s0; } =20 #define __HAVE_ARCH_MEMSET32 static inline void *memset32(uint32_t *s, uint32_t v, size_t n) { - long d0, d1; - asm volatile("rep\n\t" - "stosl" - : "=3D&c" (d0), "=3D&D" (d1) - : "a" (v), "1" (s), "0" (n) - : "memory"); - return s; + const __auto_type s0 =3D s; + asm volatile ( + "rep stosl" + : "+D" (s), "+c" (n) + : "a" (v) + : "memory" + ); + return s0; } =20 #define __HAVE_ARCH_MEMSET64 static inline void *memset64(uint64_t *s, uint64_t v, size_t n) { - long d0, d1; - asm volatile("rep\n\t" - "stosq" - : "=3D&c" (d0), "=3D&D" (d1) - : "a" (v), "1" (s), "0" (n) - : "memory"); - return s; + const __auto_type s0 =3D s; + asm volatile ( + "rep stosq" + : "+D" (s), "+c" (n) + : "a" (v) + : "memory" + ); + return s0; } #endif