From nobody Mon Feb 9 03:12:52 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B1BAC7FBA3; Mon, 4 Mar 2024 22:09:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709590148; cv=none; b=EBjJEmn1YrZkv0dEzW7hac8soATxhjCwq1hp0Rsh9YSxUKDkJHVHrq9a3O1jFps6HtkTy+m+WbjEJwvbGOGet0oKJqgaO8UFKdIBURQ2R/IggOcPEa3uPNr9bYTQTWqxKLzhovMAbpVtpnQtqYCw/UgMvsdKKLFYbQsu5Jp8ZHs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709590148; c=relaxed/simple; bh=zcVGU1FWkdJtv/r7ZMo1eQMy885UiMLK2UdNyj0WDqI=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=hIHYEvzbv1QGo/c92utz+SgUhEwUnmFju/sWZSJS1k669jL9OwM0JpK045cKI+fwCMo0hxxbqJgO5unLtiQUgeWUUGCQsCXgZnX0pb1YsC+ulXltwV0NyM6S2tOHZjIj0PNwTHU8+vEdBOtK4I7LknCSUAjH8deOrjK0zdisryU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=zVxmdMzk; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=dUk/Qr0a; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="zVxmdMzk"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="dUk/Qr0a" Date: Mon, 04 Mar 2024 22:09:04 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1709590145; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=msKdZN1FIdkJsvGHtgVf4exa1Dhu8m6Cd1T56XGWsFk=; b=zVxmdMzkJoxY4CZUIUsaesghcMwOR8DXlJ9+PGLXmDvgQTgk6Jfb1l6yPZyH7J/CVyOn+G MjvoMlhpakUS2VafHQzlIsRJTgVxM37+54FF6ZkJVmKF38FdnLR7nv0EQYOhMR3t6DbUYh nWX6B1pKsUtMX+85M9n93NwxFU1Jq+B/9vhjLWelJ7EVC2U3GK+Oycge3iHNW4voQM9z3m PkRbMe55nbTJQ/eQYERqCyEDKR+RkSUasFTJFu+QuHSPscTo5+OT8pZuUlCpohFFG0+DFW Nk5YJ7MpnnuNaqwsf3Dzy0N5wYDqv/sQsJxcNeA91kka2ayZxkCL5yV/pcfcng== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1709590145; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=msKdZN1FIdkJsvGHtgVf4exa1Dhu8m6Cd1T56XGWsFk=; b=dUk/Qr0aF18xkH7VH2AcHU7fMK2kocU9U6EWR/cfrdY0K9nfIuCgqMDI5BewwAlRaLKqXG IHtlTqt0yQXobaCQ== From: "tip-bot2 for Ard Biesheuvel" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/boot] x86/startup_64: Defer assignment of 5-level paging global variables Cc: Ard Biesheuvel , "Borislav Petkov (AMD)" , Tom Lendacky , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20240227151907.387873-13-ardb+git@google.com> References: <20240227151907.387873-13-ardb+git@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <170959014430.398.13531651821121011775.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/boot branch of tip: Commit-ID: 63bed96604205fa0b23c91d268df5f1f1b26faf6 Gitweb: https://git.kernel.org/tip/63bed96604205fa0b23c91d268df5f1f1= b26faf6 Author: Ard Biesheuvel AuthorDate: Tue, 27 Feb 2024 16:19:10 +01:00 Committer: Borislav Petkov (AMD) CommitterDate: Mon, 04 Mar 2024 18:12:06 +01:00 x86/startup_64: Defer assignment of 5-level paging global variables Assigning the 5-level paging related global variables from the earliest C code using explicit references that use the 1:1 translation of memory is unnecessary, as the startup code itself does not rely on them to create the initial page tables, and this is all it should be doing. So defer these assignments to the primary C entry code that executes via the ordinary kernel virtual mapping. Signed-off-by: Ard Biesheuvel Signed-off-by: Borislav Petkov (AMD) Tested-by: Tom Lendacky Link: https://lore.kernel.org/r/20240227151907.387873-13-ardb+git@google.com --- arch/x86/include/asm/pgtable_64_types.h | 2 +- arch/x86/kernel/head64.c | 44 +++++++----------------- 2 files changed, 15 insertions(+), 31 deletions(-) diff --git a/arch/x86/include/asm/pgtable_64_types.h b/arch/x86/include/asm= /pgtable_64_types.h index 38b54b9..9053dfe 100644 --- a/arch/x86/include/asm/pgtable_64_types.h +++ b/arch/x86/include/asm/pgtable_64_types.h @@ -21,9 +21,9 @@ typedef unsigned long pgprotval_t; typedef struct { pteval_t pte; } pte_t; typedef struct { pmdval_t pmd; } pmd_t; =20 -#ifdef CONFIG_X86_5LEVEL extern unsigned int __pgtable_l5_enabled; =20 +#ifdef CONFIG_X86_5LEVEL #ifdef USE_EARLY_PGTABLE_L5 /* * cpu_feature_enabled() is not available in early boot code. diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c index fd77a26..212e8e0 100644 --- a/arch/x86/kernel/head64.c +++ b/arch/x86/kernel/head64.c @@ -23,6 +23,7 @@ #include =20 #include +#include #include #include #include @@ -68,24 +69,11 @@ unsigned long vmemmap_base __ro_after_init =3D __VMEMMA= P_BASE_L4; EXPORT_SYMBOL(vmemmap_base); #endif =20 -#ifdef CONFIG_X86_5LEVEL -static void __head *fixup_pointer(void *ptr, unsigned long physaddr) -{ - return ptr - (void *)_text + (void *)physaddr; -} - -static unsigned long __head *fixup_long(void *ptr, unsigned long physaddr) +static inline bool check_la57_support(void) { - return fixup_pointer(ptr, physaddr); -} - -static unsigned int __head *fixup_int(void *ptr, unsigned long physaddr) -{ - return fixup_pointer(ptr, physaddr); -} + if (!IS_ENABLED(CONFIG_X86_5LEVEL)) + return false; =20 -static bool __head check_la57_support(unsigned long physaddr) -{ /* * 5-level paging is detected and enabled at kernel decompression * stage. Only check if it has been enabled there. @@ -93,21 +81,8 @@ static bool __head check_la57_support(unsigned long phys= addr) if (!(native_read_cr4() & X86_CR4_LA57)) return false; =20 - *fixup_int(&__pgtable_l5_enabled, physaddr) =3D 1; - *fixup_int(&pgdir_shift, physaddr) =3D 48; - *fixup_int(&ptrs_per_p4d, physaddr) =3D 512; - *fixup_long(&page_offset_base, physaddr) =3D __PAGE_OFFSET_BASE_L5; - *fixup_long(&vmalloc_base, physaddr) =3D __VMALLOC_BASE_L5; - *fixup_long(&vmemmap_base, physaddr) =3D __VMEMMAP_BASE_L5; - return true; } -#else -static bool __head check_la57_support(unsigned long physaddr) -{ - return false; -} -#endif =20 static unsigned long __head sme_postprocess_startup(struct boot_params *bp= , pmdval_t *pmd) { @@ -171,7 +146,7 @@ unsigned long __head __startup_64(unsigned long physadd= r, bool la57; int i; =20 - la57 =3D check_la57_support(physaddr); + la57 =3D check_la57_support(); =20 /* Is the address too large? */ if (physaddr >> MAX_PHYSMEM_BITS) @@ -456,6 +431,15 @@ asmlinkage __visible void __init __noreturn x86_64_sta= rt_kernel(char * real_mode (__START_KERNEL & PGDIR_MASK))); BUILD_BUG_ON(__fix_to_virt(__end_of_fixed_addresses) <=3D MODULES_END); =20 + if (check_la57_support()) { + __pgtable_l5_enabled =3D 1; + pgdir_shift =3D 48; + ptrs_per_p4d =3D 512; + page_offset_base =3D __PAGE_OFFSET_BASE_L5; + vmalloc_base =3D __VMALLOC_BASE_L5; + vmemmap_base =3D __VMEMMAP_BASE_L5; + } + cr4_init_shadow(); =20 /* Kill off the identity-map trampoline */