From nobody Sun Dec 28 04:40:39 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40EC6C4332F for ; Tue, 12 Dec 2023 14:44:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1376899AbjLLOoS (ORCPT ); Tue, 12 Dec 2023 09:44:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43386 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1376853AbjLLOoQ (ORCPT ); Tue, 12 Dec 2023 09:44:16 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6ECC7F2; Tue, 12 Dec 2023 06:44:22 -0800 (PST) Date: Tue, 12 Dec 2023 14:44:19 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1702392260; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=CPE1TxfztaCUJ8c67Q6iVKgI7+m5XFqGsRpjgNaFBhA=; b=xDbofv7U9/y5e8vJo4YOLZCjgvvbFtG7caAFnqU75p5RKA5mF+PwCU1MDEDuM7fscadzzj 9+/DZxnDIShhPLRnsBrrVrn5oNlDb/aq9Uv3xEMzid/i+QbV3rRR4HW/ezVFmZB2zgvmrh E/6ZulsnB6Aa7hNS+P3gbjbD4cq33bHnAtW3Ik5Lb01sq80gCodYuw0Shl8zOnm2FpVpiJ DGlVBeD1JgpsmQ/r05rQ3kPsy9240XVre3K2zgUvNkUnLemzvnhVyvFFF2EhHPIpyuEB5D nkHqmOBgdNyElLcmPFLKSxnFB7kxGMY9Tndr3ehGv8ECGXBbVIB1JAJ2kiNM5w== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1702392260; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=CPE1TxfztaCUJ8c67Q6iVKgI7+m5XFqGsRpjgNaFBhA=; b=2Rd3tXeUE92TOmpW1kpuroJHZnX0y+X76NRkhS3g76aSIYvXIS2fm7AEX3xaEbmcwDVRTZ hjILWrI8Ez/5JEBA== From: "tip-bot2 for Konrad Dybcio" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/core] irqchip/qcom-mpm: Support passing a slice of SRAM as reg space Cc: Konrad Dybcio , Thomas Gleixner , "Bryan O'Donoghue" , Shawn Guo , x86@kernel.org, linux-kernel@vger.kernel.org, maz@kernel.org In-Reply-To: <20230328-topic-msgram_mpm-v7-2-6ee2bfeaac2c@linaro.org> References: <20230328-topic-msgram_mpm-v7-2-6ee2bfeaac2c@linaro.org> MIME-Version: 1.0 Message-ID: <170239225978.398.6776352456083979765.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the irq/core branch of tip: Commit-ID: 221b110d87c2d3ea113ad784b2c6505726a3e157 Gitweb: https://git.kernel.org/tip/221b110d87c2d3ea113ad784b2c650572= 6a3e157 Author: Konrad Dybcio AuthorDate: Mon, 27 Nov 2023 16:52:13 +01:00 Committer: Thomas Gleixner CommitterDate: Tue, 12 Dec 2023 15:40:42 +01:00 irqchip/qcom-mpm: Support passing a slice of SRAM as reg space The MPM hardware is accessible from the ARM CPUs through a shared memory region (RPM MSG RAM) which is also concurrently accessed by other kinds of cores on the system like modem, ADSP etc. Modeling this relation in a (somewhat) sane manner in the device tree requires to - either present the MPM as a child of said memory region, which makes little sense, as a mapped memory carveout is not a bus. - define nodes which bleed their register spaces into one another - or passing their slice of the MSG RAM through a property Go with the third option and add a way to map a region passed through the "qcom,rpm-msg-ram" property as register space for the MPM interrupt controller. The current way of using 'reg' is preserved for backwards compatibility reasons. [ tglx: Massaged changelog ] Signed-off-by: Konrad Dybcio Signed-off-by: Thomas Gleixner Reviewed-by: Bryan O'Donoghue Acked-by: Shawn Guo Link: https://lore.kernel.org/r/20230328-topic-msgram_mpm-v7-2-6ee2bfeaac2c= @linaro.org --- drivers/irqchip/irq-qcom-mpm.c | 26 +++++++++++++++++++++++--- 1 file changed, 23 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-qcom-mpm.c b/drivers/irqchip/irq-qcom-mpm.c index 7124565..cda5838 100644 --- a/drivers/irqchip/irq-qcom-mpm.c +++ b/drivers/irqchip/irq-qcom-mpm.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -322,8 +323,10 @@ static int qcom_mpm_init(struct device_node *np, struc= t device_node *parent) struct device *dev =3D &pdev->dev; struct irq_domain *parent_domain; struct generic_pm_domain *genpd; + struct device_node *msgram_np; struct qcom_mpm_priv *priv; unsigned int pin_cnt; + struct resource res; int i, irq; int ret; =20 @@ -374,9 +377,26 @@ static int qcom_mpm_init(struct device_node *np, struc= t device_node *parent) =20 raw_spin_lock_init(&priv->lock); =20 - priv->base =3D devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(priv->base)) - return PTR_ERR(priv->base); + /* If we have a handle to an RPM message ram partition, use it. */ + msgram_np =3D of_parse_phandle(np, "qcom,rpm-msg-ram", 0); + if (msgram_np) { + ret =3D of_address_to_resource(msgram_np, 0, &res); + if (ret) { + of_node_put(msgram_np); + return ret; + } + + /* Don't use devm_ioremap_resource, as we're accessing a shared region. = */ + priv->base =3D devm_ioremap(dev, res.start, resource_size(&res)); + of_node_put(msgram_np); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + } else { + /* Otherwise, fall back to simple MMIO. */ + priv->base =3D devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + } =20 for (i =3D 0; i < priv->reg_stride; i++) { qcom_mpm_write(priv, MPM_REG_ENABLE, i, 0);