From nobody Sun Dec 28 10:13:11 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6BAB3C10DCE for ; Fri, 8 Dec 2023 21:14:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1574797AbjLHVOm (ORCPT ); Fri, 8 Dec 2023 16:14:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40366 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229817AbjLHVOg (ORCPT ); Fri, 8 Dec 2023 16:14:36 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ACCD9172B; Fri, 8 Dec 2023 13:14:40 -0800 (PST) Date: Fri, 08 Dec 2023 21:14:38 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1702070079; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=YPySH3jFpIVr2fDLoaXilgHfUPGWqTOWobs6EMgOif8=; b=MVfaT7i7FqdXQjcMFNGJT6iXu5/C0rBNJfX5SiPQzQALvl5PeMnzVpaghASjRybJF/zkPa 3l3j3OG7PJzYyWb0BjekHp6O3FbEF/Qi0dMRKvr9keAuiFK7oqFLGVnOkEfnzMlwj6t06r JpmuuI/nfe6AP5qfRjBNiA8etQIYyVMMClUCGwjw9A72y6T6dDoX5pQmOr0rKa6Bv1SiJt 1XM6godzMGLdKeZJeFTAq3bxJBa2bAGyb0AKSYfjTOUjFTr5iyg3mDhADXfyxA/ZaDbCKy auO2OgKHz3u7jhwtfwgQ6hjzgwZAUgc8ofpBQw5rrUDbj+W/ru+pENIX1WQP6A== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1702070079; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=YPySH3jFpIVr2fDLoaXilgHfUPGWqTOWobs6EMgOif8=; b=e2VZ15yPOUUu8zyosEfLDIaCeJ3BppDu3BW4nZxARcDdhF4lkCV5YFOdOjt1FoNquCuZz+ fV0YYtBwcIe/YzBw== From: "tip-bot2 for Claudiu Beznea" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/core] arm64: dts: renesas: r9108g045: Add IA55 interrupt controller node Cc: Claudiu Beznea , Thomas Gleixner , x86@kernel.org, linux-kernel@vger.kernel.org, maz@kernel.org In-Reply-To: <20231120111820.87398-10-claudiu.beznea.uj@bp.renesas.com> References: <20231120111820.87398-10-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 Message-ID: <170207007858.398.5775493085982200914.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the irq/core branch of tip: Commit-ID: 8794f5c3d2299670d16b2fb1e6657f5f33c1518c Gitweb: https://git.kernel.org/tip/8794f5c3d2299670d16b2fb1e6657f5f3= 3c1518c Author: Claudiu Beznea AuthorDate: Mon, 20 Nov 2023 13:18:20 +02:00 Committer: Thomas Gleixner CommitterDate: Fri, 08 Dec 2023 22:06:35 +01:00 arm64: dts: renesas: r9108g045: Add IA55 interrupt controller node Add IA55 interrupt controller node and set it as interrupt parent for pin controller. Signed-off-by: Claudiu Beznea Signed-off-by: Thomas Gleixner Link: https://lore.kernel.org/r/20231120111820.87398-10-claudiu.beznea.uj@b= p.renesas.com --- arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 68 +++++++++++++++++++++- 1 file changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/d= ts/renesas/r9a08g045.dtsi index 6c7b29b..010bca6 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi @@ -96,6 +96,7 @@ #gpio-cells =3D <2>; interrupt-controller; #interrupt-cells =3D <2>; + interrupt-parent =3D <&irqc>; gpio-ranges =3D <&pinctrl 0 0 152>; clocks =3D <&cpg CPG_MOD R9A08G045_GPIO_HCLK>; power-domains =3D <&cpg>; @@ -104,6 +105,73 @@ <&cpg R9A08G045_GPIO_SPARE_RESETN>; }; =20 + irqc: interrupt-controller@11050000 { + compatible =3D "renesas,r9a08g045-irqc", "renesas,rzg2l-irqc"; + #interrupt-cells =3D <2>; + #address-cells =3D <0>; + interrupt-controller; + reg =3D <0 0x11050000 0 0x10000>; + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "nmi", + "irq0", "irq1", "irq2", "irq3", + "irq4", "irq5", "irq6", "irq7", + "tint0", "tint1", "tint2", "tint3", + "tint4", "tint5", "tint6", "tint7", + "tint8", "tint9", "tint10", "tint11", + "tint12", "tint13", "tint14", "tint15", + "tint16", "tint17", "tint18", "tint19", + "tint20", "tint21", "tint22", "tint23", + "tint24", "tint25", "tint26", "tint27", + "tint28", "tint29", "tint30", "tint31", + "bus-err"; + clocks =3D <&cpg CPG_MOD R9A08G045_IA55_CLK>, + <&cpg CPG_MOD R9A08G045_IA55_PCLK>; + clock-names =3D "clk", "pclk"; + power-domains =3D <&cpg>; + resets =3D <&cpg R9A08G045_IA55_RESETN>; + }; + sdhi0: mmc@11c00000 { compatible =3D "renesas,sdhi-r9a08g045", "renesas,rcar-gen3-sdhi"; reg =3D <0x0 0x11c00000 0 0x10000>;