From nobody Sun Dec 28 10:06:31 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2EA0DC4167B for ; Fri, 8 Dec 2023 21:14:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1574792AbjLHVOk (ORCPT ); Fri, 8 Dec 2023 16:14:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40350 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229739AbjLHVOg (ORCPT ); Fri, 8 Dec 2023 16:14:36 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DB9BB1985; Fri, 8 Dec 2023 13:14:39 -0800 (PST) Date: Fri, 08 Dec 2023 21:14:37 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1702070078; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=R4gR2RBzl4XZ+OuFIyikjZWovbgyoPQsIk2ZHiKmq4c=; b=sL4gUh4zzzybyMCXc54pjQ2iVXXLgYgPDp9VnlyeGY6Jz5wCEoogHvdEuPX7tFwdfj8vzw OrcMk+3YT4NhRfpgWANoaNzqiUGYZh8O0qHDJydDj6CQb8981WQkNa+xCg1IceN9fFyD2e 8qRcj4qDm0bv/aMZ0sHacgLgq3QxdJY99Pl15bZvr9XOpVGUX04yTOzRZ8G4mNGbk1V04u SQ/ERfkAXlGMZ9Ao9X6WCaWiF8dQrlZXkwdI7vn1HhZkSbL/w6JK2MOpD3yLKYA+nlGctY lPuco0/4WnDKIYy1mAPUbMFLtxU4PjfINscd5KpzHC8q/2UdyA7jAdWJgQKSxQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1702070078; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=R4gR2RBzl4XZ+OuFIyikjZWovbgyoPQsIk2ZHiKmq4c=; b=OL+OP7o1NZ+OUvioLce9IOhG5Swf8g7BN232m+FFdmJO/Q5kpnKMS3vDMPuz3wDsOEiAQu OKBQaWUYLGsHV7Bg== From: "tip-bot2 for Konrad Dybcio" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/core] dt-bindings: interrupt-controller: mpm: Pass MSG RAM slice through phandle Cc: Konrad Dybcio , Thomas Gleixner , Krzysztof Kozlowski , x86@kernel.org, linux-kernel@vger.kernel.org, maz@kernel.org In-Reply-To: <20230328-topic-msgram_mpm-v7-1-6ee2bfeaac2c@linaro.org> References: <20230328-topic-msgram_mpm-v7-1-6ee2bfeaac2c@linaro.org> MIME-Version: 1.0 Message-ID: <170207007784.398.672518304250442085.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the irq/core branch of tip: Commit-ID: 3ff156f0d4e71f96b15f9b16f3b6a82b617c4bb7 Gitweb: https://git.kernel.org/tip/3ff156f0d4e71f96b15f9b16f3b6a82b6= 17c4bb7 Author: Konrad Dybcio AuthorDate: Mon, 27 Nov 2023 16:52:12 +01:00 Committer: Thomas Gleixner CommitterDate: Fri, 08 Dec 2023 22:06:36 +01:00 dt-bindings: interrupt-controller: mpm: Pass MSG RAM slice through phandle Due to the wild nature of the Qualcomm RPM Message RAM, the kernel can't really use 'reg' to point to the MPM's slice of Message RAM without cutting into an already-defined RPM MSG RAM node used for GLINK and SMEM. Document passing the register space as a slice of SRAM through the qcom,rpm-msg-ram property. This also makes 'reg' deprecated. Signed-off-by: Konrad Dybcio Signed-off-by: Thomas Gleixner Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230328-topic-msgram_mpm-v7-1-6ee2bfeaac2c= @linaro.org --- Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml | 52 = +++++++++++++++++++++++++++++++++++----------------- 1 file changed, 35 insertions(+), 17 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,mp= m.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.ya= ml index 509d20c..4ce7912 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml @@ -29,6 +29,12 @@ properties: maxItems: 1 description: Specifies the base address and size of vMPM registers in RPM MSG RAM. + deprecated: true + + qcom,rpm-msg-ram: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the APSS MPM slice of the RPM Message RAM =20 interrupts: maxItems: 1 @@ -64,33 +70,45 @@ properties: =20 required: - compatible - - reg - interrupts - mboxes - interrupt-controller - '#interrupt-cells' - qcom,mpm-pin-count - qcom,mpm-pin-map + - qcom,rpm-msg-ram =20 additionalProperties: false =20 examples: - | #include - mpm: interrupt-controller@45f01b8 { - compatible =3D "qcom,mpm"; - interrupts =3D ; - reg =3D <0x45f01b8 0x1000>; - mboxes =3D <&apcs_glb 1>; - interrupt-controller; - #interrupt-cells =3D <2>; - interrupt-parent =3D <&intc>; - qcom,mpm-pin-count =3D <96>; - qcom,mpm-pin-map =3D <2 275>, - <5 296>, - <12 422>, - <24 79>, - <86 183>, - <90 260>, - <91 260>; + + remoteproc-rpm { + compatible =3D "qcom,msm8998-rpm-proc", "qcom,rpm-proc"; + + glink-edge { + compatible =3D "qcom,glink-rpm"; + + interrupts =3D ; + qcom,rpm-msg-ram =3D <&rpm_msg_ram>; + mboxes =3D <&apcs_glb 0>; + }; + + mpm: interrupt-controller { + compatible =3D "qcom,mpm"; + qcom,rpm-msg-ram =3D <&apss_mpm>; + interrupts =3D ; + mboxes =3D <&apcs_glb 1>; + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&intc>; + qcom,mpm-pin-count =3D <96>; + qcom,mpm-pin-map =3D <2 275>, + <5 296>, + <12 422>, + <24 79>, + <86 183>, + <91 260>; + }; };