From nobody Mon Dec 29 00:39:11 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 81B2EC4167B for ; Sun, 3 Dec 2023 11:16:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233337AbjLCLP5 (ORCPT ); Sun, 3 Dec 2023 06:15:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38722 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229450AbjLCLPz (ORCPT ); Sun, 3 Dec 2023 06:15:55 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BFA3CA2; Sun, 3 Dec 2023 03:16:00 -0800 (PST) Date: Sun, 03 Dec 2023 11:15:56 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1701602158; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=YQ+VBXklhmVch7Sg2vc0ARJ1AeCnK1tBH54ISC203KI=; b=aCiqE0gJlIwkgJbAP7VryY/SfHO2newtiJlJsbMsBdAnC/qthTaU+JRoXoakp9XrGLjxVD UnEILmt5H9vLjrjwuv/w3P572/pbDUrEx1aC6aqsWx3NMCsARcVf8No7J1Cce392F5Q89t GbK2ZTyP4MzgKOewnNDxuGFQLNaxIjCH2J82hTiZQjh5Pt7UqQ1QjFAhb7mGVbBVsrX5Pd 8l/roLWkOqK9opU9Au0KWdgqseAbZnezB4Hchmmz75LJFsiH9sMK+Y7dbwYHPDMTUCBEo7 qpm4yooV0Eh0WzlflzZ03nNxibLdmfSAf7Ti6aqMiUJozc/utyPXHaYj0XMvww== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1701602158; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=YQ+VBXklhmVch7Sg2vc0ARJ1AeCnK1tBH54ISC203KI=; b=8JGd6ffJHHd6dgW56m4o+GfX6/Rt1zNYXkDBMR1PopCo2xT98Ho9XXGQBYkgWUfimrFjgN nOiqMeAHSH4LWkCA== From: "tip-bot2 for Borislav Petkov (AMD)" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/microcode] x86/microcode/intel: Set new revision only after a successful update Cc: Ashok Raj , "Borislav Petkov (AMD)" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: References: MIME-Version: 1.0 Message-ID: <170160215680.398.309337215455167122.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the x86/microcode branch of tip: Commit-ID: 9c21ea53e6bd1104c637b80a0688040f184cc761 Gitweb: https://git.kernel.org/tip/9c21ea53e6bd1104c637b80a0688040f1= 84cc761 Author: Borislav Petkov (AMD) AuthorDate: Fri, 01 Dec 2023 14:35:06 +01:00 Committer: Borislav Petkov (AMD) CommitterDate: Sun, 03 Dec 2023 11:49:53 +01:00 x86/microcode/intel: Set new revision only after a successful update This was meant to be done only when early microcode got updated successfully. Move it into the if-branch. Also, make sure the current revision is read unconditionally and only once. Fixes: 080990aa3344 ("x86/microcode: Rework early revisions reporting") Reported-by: Ashok Raj Signed-off-by: Borislav Petkov (AMD) Tested-by: Ashok Raj Link: https://lore.kernel.org/r/ZWjVt5dNRjbcvlzR@a4bf019067fa.jf.intel.com --- arch/x86/kernel/cpu/microcode/intel.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/mi= crocode/intel.c index 5d6ea87..857e608 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -370,14 +370,14 @@ static __init struct microcode_intel *get_microcode_b= lob(struct ucode_cpu_info * { struct cpio_data cp; =20 + intel_collect_cpu_info(&uci->cpu_sig); + if (!load_builtin_intel_microcode(&cp)) cp =3D find_microcode_in_initrd(ucode_path); =20 if (!(cp.data && cp.size)) return NULL; =20 - intel_collect_cpu_info(&uci->cpu_sig); - return scan_microcode(cp.data, cp.size, uci, save); } =20 @@ -410,13 +410,13 @@ void __init load_ucode_intel_bsp(struct early_load_da= ta *ed) { struct ucode_cpu_info uci; =20 - ed->old_rev =3D intel_get_microcode_revision(); - uci.mc =3D get_microcode_blob(&uci, false); - if (uci.mc && apply_microcode_early(&uci) =3D=3D UCODE_UPDATED) - ucode_patch_va =3D UCODE_BSP_LOADED; + ed->old_rev =3D uci.cpu_sig.rev; =20 - ed->new_rev =3D uci.cpu_sig.rev; + if (uci.mc && apply_microcode_early(&uci) =3D=3D UCODE_UPDATED) { + ucode_patch_va =3D UCODE_BSP_LOADED; + ed->new_rev =3D uci.cpu_sig.rev; + } } =20 void load_ucode_intel_ap(void)