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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C Received: from SATLEXMB03.amd.com (165.204.84.17) by SA2PEPF000015C8.mail.protection.outlook.com (10.167.241.198) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6933.15 via Frontend Transport; Thu, 26 Oct 2023 19:42:13 +0000 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.32; Thu, 26 Oct 2023 14:42:12 -0500 Received: from xhdradheys41.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.32 via Frontend Transport; Thu, 26 Oct 2023 14:42:09 -0500 From: Radhey Shyam Pandey To: , , , , , , , , , CC: , , , Subject: [PATCH] dt-bindings: firmware: versal: add versal-net compatible string Date: Fri, 27 Oct 2023 01:12:08 +0530 Message-ID: <1698349328-2321184-1-git-send-email-radhey.shyam.pandey@amd.com> X-Mailer: git-send-email 2.1.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015C8:EE_|SA1PR12MB8643:EE_ X-MS-Office365-Filtering-Correlation-Id: efc0999c-5a0a-4069-962f-08dbd65ba6e1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Oct 2023 19:42:13.2602 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: efc0999c-5a0a-4069-962f-08dbd65ba6e1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C8.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB8643 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jay Buddhabhatti Add dt-binding documentation for Versal NET platforms. Versal Net is a new AMD/Xilinx SoC. The SoC and its architecture is based on the Versal ACAP device. The Versal Net device includes more security features in the platform management controller (PMC) and increases the number of CPUs in the application processing unit (APU) and the real-time processing unit (RPU). Signed-off-by: Jay Buddhabhatti Signed-off-by: Radhey Shyam Pandey Acked-by: Krzysztof Kozlowski --- This usecase also looks similar to versal-net clock upstream compatible discussion[1], so inline with mainline suggestion i have modified firmware binding. Also firmware driver can be modified later on when there is a real SoC specific compatible string need. [1]: https://lore.kernel.org/all/20230620110137.5701-1-shubhrajyoti.datta@a= md.com --- .../bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-= firmware.yaml b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynq= mp-firmware.yaml index 822864488dcb..c5483d80ce3c 100644 --- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmwar= e.yaml +++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmwar= e.yaml @@ -26,6 +26,12 @@ properties: - description: For implementations complying for Versal. const: xlnx,versal-firmware =20 + - description: For implementations complying for Versal NET. + items: + - enum: + - xlnx,versal-net-firmware + - const: xlnx,versal-firmware + method: description: | The method of calling the PM-API firmware layer. --=20 2.34.1