From nobody Tue Dec 16 20:15:23 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CBEF7C07545 for ; Tue, 24 Oct 2023 13:22:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234428AbjJXNWL (ORCPT ); Tue, 24 Oct 2023 09:22:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37790 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234654AbjJXNVe (ORCPT ); Tue, 24 Oct 2023 09:21:34 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 60DCF171B; Tue, 24 Oct 2023 06:21:01 -0700 (PDT) Date: Tue, 24 Oct 2023 13:20:58 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1698153659; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=V4ecj8dTDYA1IyyMtmPGKsFad/wZPBOHhKIZjfIhAss=; b=kqMZnmQAKka1MOgTfUpoTbsLu7GyCjaTUAf/DTlm033XKs+1ueJgXeIbmr+NGJRVNXtRti YjlUtePpX3uTuNzwYS/UysaodCs0n7Wv/WOpkhUOpLezyvD4xoL2dkeCrUeQU7InYVhNxJ LyTzUjXrwVRANmGHAmEyOG/VIZiJMU3y1DKxHSJsANVLSUPo4KXD53sMXGWF/Q/BYh4G+A W1t1+4156YkmT0//sVkLEJJScFn9OctNQ9c/z6DA+qaaoTu4K0kCdxxV5l85nw6GT4puhj SXar7c/AEAN/dMNU040I2SOPl2iVIgD/jAgGIj4f+6CWj0XhHtBGqIbBBMygNg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1698153659; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=V4ecj8dTDYA1IyyMtmPGKsFad/wZPBOHhKIZjfIhAss=; b=CS5UoPjnWSxDzWNc4Ki91CtZ5kjnUeK7lRVUGYdfXf06+a7tKSFTOGZmCdz1hc4sNFXKWB Kno7Qx2gEHxHByAg== From: "tip-bot2 for Thomas Gleixner" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/microcode] x86/microcode: Get rid of the schedule work indirection Cc: Thomas Gleixner , "Borislav Petkov (AMD)" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20231017211723.354748138@linutronix.de> References: <20231017211723.354748138@linutronix.de> MIME-Version: 1.0 Message-ID: <169815365881.3135.12389169576692651192.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the x86/microcode branch of tip: Commit-ID: 2e1997335ceb6fc819862804f51d4fe83593c138 Gitweb: https://git.kernel.org/tip/2e1997335ceb6fc819862804f51d4fe83= 593c138 Author: Thomas Gleixner AuthorDate: Tue, 17 Oct 2023 23:23:58 +02:00 Committer: Borislav Petkov (AMD) CommitterDate: Tue, 24 Oct 2023 15:05:54 +02:00 x86/microcode: Get rid of the schedule work indirection Scheduling work on all CPUs to collect the microcode information is just another extra step for no value. Let the CPU hotplug callback registration do it. Signed-off-by: Thomas Gleixner Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/r/20231017211723.354748138@linutronix.de --- arch/x86/kernel/cpu/microcode/core.c | 29 +++++++++------------------ 1 file changed, 10 insertions(+), 19 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/mic= rocode/core.c index 37145cf..0ed96d2 100644 --- a/arch/x86/kernel/cpu/microcode/core.c +++ b/arch/x86/kernel/cpu/microcode/core.c @@ -481,8 +481,16 @@ static struct syscore_ops mc_syscore_ops =3D { =20 static int mc_cpu_online(unsigned int cpu) { + struct ucode_cpu_info *uci =3D ucode_cpu_info + cpu; struct device *dev =3D get_cpu_device(cpu); =20 + memset(uci, 0, sizeof(*uci)); + + microcode_ops->collect_cpu_info(cpu, &uci->cpu_sig); + cpu_data(cpu).microcode =3D uci->cpu_sig.rev; + if (!cpu) + boot_cpu_data.microcode =3D uci->cpu_sig.rev; + if (sysfs_create_group(&dev->kobj, &mc_attr_group)) pr_err("Failed to create group for CPU%d\n", cpu); return 0; @@ -503,20 +511,6 @@ static int mc_cpu_down_prep(unsigned int cpu) return 0; } =20 -static void setup_online_cpu(struct work_struct *work) -{ - int cpu =3D smp_processor_id(); - struct ucode_cpu_info *uci =3D ucode_cpu_info + cpu; - - memset(uci, 0, sizeof(*uci)); - - microcode_ops->collect_cpu_info(cpu, &uci->cpu_sig); - cpu_data(cpu).microcode =3D uci->cpu_sig.rev; - if (!cpu) - boot_cpu_data.microcode =3D uci->cpu_sig.rev; - mc_cpu_online(cpu); -} - static struct attribute *cpu_root_microcode_attrs[] =3D { #ifdef CONFIG_MICROCODE_LATE_LOADING &dev_attr_reload.attr, @@ -562,12 +556,9 @@ static int __init microcode_init(void) } } =20 - /* Do per-CPU setup */ - schedule_on_each_cpu(setup_online_cpu); - register_syscore_ops(&mc_syscore_ops); - cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "x86/microcode:online", - mc_cpu_online, mc_cpu_down_prep); + cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "x86/microcode:online", + mc_cpu_online, mc_cpu_down_prep); =20 pr_info("Microcode Update Driver: v%s.", DRIVER_VERSION);