From nobody Tue Dec 16 13:48:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8E6CC001DF for ; Fri, 20 Oct 2023 11:40:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377436AbjJTLkh (ORCPT ); Fri, 20 Oct 2023 07:40:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41216 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377053AbjJTLkJ (ORCPT ); Fri, 20 Oct 2023 07:40:09 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A511E2D4F; Fri, 20 Oct 2023 04:38:33 -0700 (PDT) Date: Fri, 20 Oct 2023 11:38:01 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1697801882; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bI6h3ZXrFJlAz85xZf+eWjJqfjcQj5YN3Qw988FOZXE=; b=YVRAuBSbGwFifToF/lRDFUoI3a0y6NLpdG43fGffsitoFetiFxVioghoMjeFOTLhLe4oJs hBpwoGIodbtmUfhN7DSvgBvm+0UxuKgwJ13oNR6BI9J7WJOHX23f3dqQy1URskhLP7A/H2 x0aTezzF8gLOX4gcOIVNBJwJfqGp04WYX7+6tzwUMwx4mAwhSuwY3RT5mVwObNvv88APlI AULdtYYDcgMZirdpYVhpp74HoRLPcxhCD3qN1XZ13FU1aePs6zkcSunmMmjS2x8Kcss3Ju yivYsV6oqQEpmDO6jKQ3TdGyNs+ROzuZG9wsu4R2cGEkYRV7U3oUl+0+ddK9fQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1697801882; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bI6h3ZXrFJlAz85xZf+eWjJqfjcQj5YN3Qw988FOZXE=; b=rCGaZU613bEwO0VPkOGee2cFEIbhg/jZRKNeGpEmfRCtgd+7JTwN8U1GDPOIa2OShhDhvz Wo7uihWhedF4URAw== From: "tip-bot2 for Thomas Gleixner" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/microcode] x86/microcode/intel: Simplify scan_microcode() Cc: Thomas Gleixner , "Borislav Petkov (AMD)" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20231002115902.271940980@linutronix.de> References: <20231002115902.271940980@linutronix.de> MIME-Version: 1.0 Message-ID: <169780188168.3135.16642949444992662278.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the x86/microcode branch of tip: Commit-ID: b0f0bf5eef5fac6ba30b7cac15ca4cb01f8a6ca9 Gitweb: https://git.kernel.org/tip/b0f0bf5eef5fac6ba30b7cac15ca4cb01= f8a6ca9 Author: Thomas Gleixner AuthorDate: Mon, 02 Oct 2023 13:59:39 +02:00 Committer: Borislav Petkov (AMD) CommitterDate: Thu, 19 Oct 2023 12:32:40 +02:00 x86/microcode/intel: Simplify scan_microcode() Make it readable and comprehensible. Signed-off-by: Thomas Gleixner Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/r/20231002115902.271940980@linutronix.de --- arch/x86/kernel/cpu/microcode/intel.c | 28 ++++++-------------------- 1 file changed, 7 insertions(+), 21 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/mi= crocode/intel.c index 03a55bf..26f759b 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -266,22 +266,16 @@ static void save_microcode_patch(void *data, unsigned= int size) intel_ucode_patch =3D (struct microcode_intel *)p; } =20 -/* - * Get microcode matching with BSP's model. Only CPUs with the same model = as - * BSP can stay in the platform. - */ -static struct microcode_intel * -scan_microcode(void *data, size_t size, struct ucode_cpu_info *uci, bool s= ave) +/* Scan CPIO for microcode matching the boot CPU's family, model, stepping= */ +static struct microcode_intel *scan_microcode(void *data, size_t size, + struct ucode_cpu_info *uci, bool save) { struct microcode_header_intel *mc_header; struct microcode_intel *patch =3D NULL; u32 cur_rev =3D uci->cpu_sig.rev; unsigned int mc_size; =20 - while (size) { - if (size < sizeof(struct microcode_header_intel)) - break; - + for (; size >=3D sizeof(struct microcode_header_intel); size -=3D mc_size= , data +=3D mc_size) { mc_header =3D (struct microcode_header_intel *)data; =20 mc_size =3D get_totalsize(mc_header); @@ -289,27 +283,19 @@ scan_microcode(void *data, size_t size, struct ucode_= cpu_info *uci, bool save) intel_microcode_sanity_check(data, false, MC_HEADER_TYPE_MICROCODE) = < 0) break; =20 - size -=3D mc_size; - - if (!intel_find_matching_signature(data, uci->cpu_sig.sig, - uci->cpu_sig.pf)) { - data +=3D mc_size; + if (!intel_find_matching_signature(data, uci->cpu_sig.sig, uci->cpu_sig.= pf)) continue; - } =20 /* BSP scan: Check whether there is newer microcode */ if (!save && cur_rev >=3D mc_header->rev) - goto next; + continue; =20 /* Save scan: Check whether there is newer or matching microcode */ if (save && cur_rev !=3D mc_header->rev) - goto next; + continue; =20 patch =3D data; cur_rev =3D mc_header->rev; - -next: - data +=3D mc_size; } =20 if (size)