From nobody Tue Dec 16 13:48:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E533C001DF for ; Fri, 20 Oct 2023 11:41:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1376976AbjJTLlP (ORCPT ); Fri, 20 Oct 2023 07:41:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41162 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377472AbjJTLks (ORCPT ); Fri, 20 Oct 2023 07:40:48 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 21ADA10FE; Fri, 20 Oct 2023 04:38:29 -0700 (PDT) Date: Fri, 20 Oct 2023 11:37:57 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1697801878; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ZElns6XfS40Ct9ZlUY549ENrx+odeWOPnSY+qHIXhuo=; b=dDHqTwolvYbzBPqNGXfR5WbhU3I+qp+Q9BUmbnRyC2OmBE/7l2LsPDzfjSiEKz+QlRKE7L B+XJsxhH7GYsCMF16axnwhp9L3erKu5PpPoc8uJ9pf82jvlc5p7kwFOgYRIQ0Y0ymXaAbD A4OoxN+NemN69u1IERhRsEcTnfa7b1eOfzC3hVeE4U/pnksLmlBtVip1bZqArPbugp2DKA cSeWVM0VfBcFG5Xi8GiEYLE37rg05ajKkCJhJXj7zBF7e2sgFd2qXjTSqKZWM1NEYGcG/S GVQ7v6xoDETOOKjDlFLPEN2oCPi2hBmp0Ajg6PeG7RzXIkJeZ2JuTtLhIJsgOQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1697801878; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ZElns6XfS40Ct9ZlUY549ENrx+odeWOPnSY+qHIXhuo=; b=8aHCPf0WGQR6biptwZBvFLbExpjWA1ZhUc6lwIKTsdsk/YJGST4VjsOqslgSc2n3ch6buH ycJZKGreaBEIhTCA== From: "tip-bot2 for Thomas Gleixner" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/microcode] x86/microcode/intel: Rework intel_cpu_collect_info() Cc: Thomas Gleixner , "Borislav Petkov (AMD)" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20231017211722.851573238@linutronix.de> References: <20231017211722.851573238@linutronix.de> MIME-Version: 1.0 Message-ID: <169780187796.3135.686281818568605462.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the x86/microcode branch of tip: Commit-ID: 5356907910df2e319df45d126b8a9ab1f4cf0cee Gitweb: https://git.kernel.org/tip/5356907910df2e319df45d126b8a9ab1f= 4cf0cee Author: Thomas Gleixner AuthorDate: Tue, 17 Oct 2023 23:23:45 +02:00 Committer: Borislav Petkov (AMD) CommitterDate: Thu, 19 Oct 2023 14:26:52 +02:00 x86/microcode/intel: Rework intel_cpu_collect_info() Nothing needs struct ucode_cpu_info. Make it take struct cpu_signature, let it return a boolean and simplify the implementation. Rename it now that the silly name clash with collect_cpu_info() is gone. Signed-off-by: Thomas Gleixner Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/r/20231017211722.851573238@linutronix.de --- arch/x86/include/asm/cpu.h | 4 +-- arch/x86/kernel/cpu/microcode/intel.c | 33 +++++++------------------- drivers/platform/x86/intel/ifs/load.c | 8 ++---- 3 files changed, 14 insertions(+), 31 deletions(-) diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h index 25050d9..068a07e 100644 --- a/arch/x86/include/asm/cpu.h +++ b/arch/x86/include/asm/cpu.h @@ -71,9 +71,9 @@ static inline void init_ia32_feat_ctl(struct cpuinfo_x86 = *c) {} =20 extern __noendbr void cet_disable(void); =20 -struct ucode_cpu_info; +struct cpu_signature; =20 -int intel_cpu_collect_info(struct ucode_cpu_info *uci); +void intel_collect_cpu_info(struct cpu_signature *sig); =20 static inline bool intel_cpu_signatures_match(unsigned int s1, unsigned in= t p1, unsigned int s2, unsigned int p2) diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/mi= crocode/intel.c index d3198de..4e5a88d 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -66,36 +66,21 @@ static inline unsigned int exttable_size(struct extende= d_sigtable *et) return et->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE; } =20 -int intel_cpu_collect_info(struct ucode_cpu_info *uci) +void intel_collect_cpu_info(struct cpu_signature *sig) { - unsigned int val[2]; - unsigned int family, model; - struct cpu_signature csig =3D { 0 }; - unsigned int eax, ebx, ecx, edx; - - memset(uci, 0, sizeof(*uci)); - - eax =3D 0x00000001; - ecx =3D 0; - native_cpuid(&eax, &ebx, &ecx, &edx); - csig.sig =3D eax; + sig->sig =3D cpuid_eax(1); + sig->pf =3D 0; + sig->rev =3D intel_get_microcode_revision(); =20 - family =3D x86_family(eax); - model =3D x86_model(eax); + if (x86_model(sig->sig) >=3D 5 || x86_family(sig->sig) > 6) { + unsigned int val[2]; =20 - if (model >=3D 5 || family > 6) { /* get processor flags from MSR 0x17 */ native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]); - csig.pf =3D 1 << ((val[1] >> 18) & 7); + sig->pf =3D 1 << ((val[1] >> 18) & 7); } - - csig.rev =3D intel_get_microcode_revision(); - - uci->cpu_sig =3D csig; - - return 0; } -EXPORT_SYMBOL_GPL(intel_cpu_collect_info); +EXPORT_SYMBOL_GPL(intel_collect_cpu_info); =20 /* * Returns 1 if update has been found, 0 otherwise. @@ -378,7 +363,7 @@ static __init struct microcode_intel *get_microcode_blo= b(struct ucode_cpu_info * if (!(cp.data && cp.size)) return NULL; =20 - intel_cpu_collect_info(uci); + intel_collect_cpu_info(&uci->cpu_sig); =20 return scan_microcode(cp.data, cp.size, uci); } diff --git a/drivers/platform/x86/intel/ifs/load.c b/drivers/platform/x86/i= ntel/ifs/load.c index cefd0d8..61174bd 100644 --- a/drivers/platform/x86/intel/ifs/load.c +++ b/drivers/platform/x86/intel/ifs/load.c @@ -227,7 +227,7 @@ out: =20 static int image_sanity_check(struct device *dev, const struct microcode_h= eader_intel *data) { - struct ucode_cpu_info uci; + struct cpu_signature sig; =20 /* Provide a specific error message when loading an older/unsupported ima= ge */ if (data->hdrver !=3D MC_HEADER_TYPE_IFS) { @@ -240,11 +240,9 @@ static int image_sanity_check(struct device *dev, cons= t struct microcode_header_ return -EINVAL; } =20 - intel_cpu_collect_info(&uci); + intel_collect_cpu_info(&sig); =20 - if (!intel_find_matching_signature((void *)data, - uci.cpu_sig.sig, - uci.cpu_sig.pf)) { + if (!intel_find_matching_signature((void *)data, sig.sig, sig.pf)) { dev_err(dev, "cpu signature, processor flags not matching\n"); return -EINVAL; }