From nobody Tue Dec 16 13:47:55 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3EB87CDB47E for ; Fri, 20 Oct 2023 11:40:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377180AbjJTLka (ORCPT ); Fri, 20 Oct 2023 07:40:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41192 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377305AbjJTLj6 (ORCPT ); Fri, 20 Oct 2023 07:39:58 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EE53D2D45; Fri, 20 Oct 2023 04:38:26 -0700 (PDT) Date: Fri, 20 Oct 2023 11:37:54 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1697801875; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=KEJcn/SQkpfrnAOraLZjYuEr65kWGX86hJM/GR9BfpY=; b=xIJ1Z5qaXVePAgOoOzMnhvoZUMB5YW5xIhlaOHZZtzGcCdTguy30FB8HoiZ5lQ9LSf9o8I d2FD3gTf60Xdb4ot+cM72DCy5vucYplg3hfoPoj/BXeuIkLT2xu6AtOHDx3d5agCqxxH2i eDAr0/YcmD8acd2+m0vT4R6HWNWNcbB8fLVQ9ijSCeXGjF0E8W5ObRIwZlrpawQehbXyhw gryvOlOdJbQI++NX7Vwf/0HoeYYR6xjSqpIg0XjfPmYSA8NaPX2IBYcjGRYERJMsvOWzg0 92T6gVUSV6CxVgecljuL0vjgeeQhIPGoiqYo3fmYnN/Y1k3A7QJeCYGp6rEMjg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1697801875; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=KEJcn/SQkpfrnAOraLZjYuEr65kWGX86hJM/GR9BfpY=; b=aPHUrb9Wcu0sb1yJmKt1hPmrk3POXvLurwk3uqFKiUE1jPw2iW9qxZroyP9BWnjB+wAjYI g73nJsFviVxvBECQ== From: "tip-bot2 for Thomas Gleixner" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/microcode] x86/microcode/amd: Cache builtin/initrd microcode early Cc: Thomas Gleixner , "Borislav Petkov (AMD)" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20231017211723.187566507@linutronix.de> References: <20231017211723.187566507@linutronix.de> MIME-Version: 1.0 Message-ID: <169780187466.3135.1705772241207572115.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the x86/microcode branch of tip: Commit-ID: d658ec9c332efa23a795b9488527ea8c675bb0fb Gitweb: https://git.kernel.org/tip/d658ec9c332efa23a795b9488527ea8c6= 75bb0fb Author: Thomas Gleixner AuthorDate: Tue, 17 Oct 2023 23:23:53 +02:00 Committer: Borislav Petkov (AMD) CommitterDate: Thu, 19 Oct 2023 15:46:04 +02:00 x86/microcode/amd: Cache builtin/initrd microcode early There is no reason to scan builtin/initrd microcode on each AP. Cache the builtin/initrd microcode in an early initcall so that the early AP loader can utilize the cache. The existing fs initcall which invoked save_microcode_in_initrd_amd() is still required to maintain the initrd_gone flag. Rename it accordingly. This will be removed once the AP loader code is converted to use the cache. Signed-off-by: Thomas Gleixner Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/r/20231017211723.187566507@linutronix.de --- arch/x86/kernel/cpu/microcode/amd.c | 8 +++++++- arch/x86/kernel/cpu/microcode/core.c | 20 ++++---------------- 2 files changed, 11 insertions(+), 17 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/micr= ocode/amd.c index 2458379..6717f0e 100644 --- a/arch/x86/kernel/cpu/microcode/amd.c +++ b/arch/x86/kernel/cpu/microcode/amd.c @@ -527,12 +527,17 @@ void load_ucode_amd_early(unsigned int cpuid_1_eax) =20 static enum ucode_state load_microcode_amd(u8 family, const u8 *data, size= _t size); =20 -int __init save_microcode_in_initrd_amd(unsigned int cpuid_1_eax) +static int __init save_microcode_in_initrd(void) { + unsigned int cpuid_1_eax =3D native_cpuid_eax(1); + struct cpuinfo_x86 *c =3D &boot_cpu_data; struct cont_desc desc =3D { 0 }; enum ucode_state ret; struct cpio_data cp; =20 + if (dis_ucode_ldr || c->x86_vendor !=3D X86_VENDOR_AMD || c->x86 < 0x10) + return 0; + find_blobs_in_containers(cpuid_1_eax, &cp); if (!(cp.data && cp.size)) return -EINVAL; @@ -549,6 +554,7 @@ int __init save_microcode_in_initrd_amd(unsigned int cp= uid_1_eax) =20 return 0; } +early_initcall(save_microcode_in_initrd); =20 /* * a small, trivial cache of per-family ucode patches diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/mic= rocode/core.c index cfc1f7a..3d769ff 100644 --- a/arch/x86/kernel/cpu/microcode/core.c +++ b/arch/x86/kernel/cpu/microcode/core.c @@ -180,24 +180,13 @@ void load_ucode_ap(void) } } =20 -static int __init save_microcode_in_initrd(void) +/* Temporary workaround until find_microcode_in_initrd() is __init */ +static int __init mark_initrd_gone(void) { - struct cpuinfo_x86 *c =3D &boot_cpu_data; - int ret =3D -EINVAL; - - switch (c->x86_vendor) { - case X86_VENDOR_AMD: - if (c->x86 >=3D 0x10) - ret =3D save_microcode_in_initrd_amd(cpuid_eax(1)); - break; - default: - break; - } - initrd_gone =3D true; - - return ret; + return 0; } +fs_initcall(mark_initrd_gone); =20 struct cpio_data find_microcode_in_initrd(const char *path) { @@ -615,5 +604,4 @@ static int __init microcode_init(void) return error; =20 } -fs_initcall(save_microcode_in_initrd); late_initcall(microcode_init);