From nobody Tue Dec 16 13:47:54 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 978CFCDB47E for ; Fri, 20 Oct 2023 11:37:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377113AbjJTLh6 (ORCPT ); Fri, 20 Oct 2023 07:37:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59086 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377186AbjJTLhX (ORCPT ); Fri, 20 Oct 2023 07:37:23 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CFF01D4C; Fri, 20 Oct 2023 04:37:21 -0700 (PDT) Date: Fri, 20 Oct 2023 11:37:19 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1697801840; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=IE4qIEV7mKAb3r8BjNRhXGXu3vaFi31zar6tkq6ay5M=; b=qBoH3awiYyzEEn5KfdA6tLIJzkbtMLZIfLlAGgGb/Mx0gosjMlTiLFEbckPc40Mk6EQnQ1 3FdQghKPMlFnpjqxnXPBh/7w2d9+C7gkROM2VGlbLFhN6tmI0yGWnXpvg0cUrCHoJVZjAp y9SaEWHYOvCf4eIZ/sZqzgzrL8MO14sYM/dh0kJowVcwriovg1hs81HL9vvQ0hjXcHGMKg ads6P2Q/YePXkZPHMMJ1d/QuiEhybb74t4m471LYBs31RkX1zYD2eVtn5Tid0CJb9HkXpL KHJi68cnW2dtsK+HdmAuDQbe4wAkAoOVb7aiXdl6clbXIfX6aH/VwW+qD0lORg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1697801840; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=IE4qIEV7mKAb3r8BjNRhXGXu3vaFi31zar6tkq6ay5M=; b=4Z5VYxPG2z+nbJ8LFIabh+GDUsBgP6WGe09v+Fj+xhpdOnJg2flf1bhhu0Stcdqy/uMIEm dQM/TxJM+n/YN9DQ== From: "tip-bot2 for Josh Poimboeuf" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/bugs] x86/srso: Remove 'pred_cmd' label Cc: Josh Poimboeuf , Ingo Molnar , "Borislav Petkov (AMD)" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: References: MIME-Version: 1.0 Message-ID: <169780183981.3135.133408986432395971.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the x86/bugs branch of tip: Commit-ID: 55ca9010c4a988b48278f81ae4129deea52d2488 Gitweb: https://git.kernel.org/tip/55ca9010c4a988b48278f81ae4129deea= 52d2488 Author: Josh Poimboeuf AuthorDate: Mon, 04 Sep 2023 22:04:57 -07:00 Committer: Borislav Petkov (AMD) CommitterDate: Fri, 20 Oct 2023 12:26:59 +02:00 x86/srso: Remove 'pred_cmd' label SBPB is only enabled in two distinct cases: 1) when SRSO has been disabled with srso=3Doff 2) when SRSO has been fixed (in future HW) Simplify the control flow by getting rid of the 'pred_cmd' label and moving the SBPB enablement check to the two corresponding code sites. This makes it more clear when exactly SBPB gets enabled. Signed-off-by: Josh Poimboeuf Signed-off-by: Ingo Molnar Signed-off-by: Borislav Petkov (AMD) Acked-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/r/bb20e8569cfa144def5e6f25e610804bc4974de2.16= 93889988.git.jpoimboe@kernel.org --- arch/x86/kernel/cpu/bugs.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c index e45dd69..4f1ad23 100644 --- a/arch/x86/kernel/cpu/bugs.c +++ b/arch/x86/kernel/cpu/bugs.c @@ -2410,13 +2410,21 @@ static void __init srso_select_mitigation(void) { bool has_microcode =3D boot_cpu_has(X86_FEATURE_IBPB_BRTYPE); =20 - if (!boot_cpu_has_bug(X86_BUG_SRSO) || cpu_mitigations_off()) - goto pred_cmd; + if (cpu_mitigations_off()) + return; + + if (!boot_cpu_has_bug(X86_BUG_SRSO)) { + if (boot_cpu_has(X86_FEATURE_SBPB)) + x86_pred_cmd =3D PRED_CMD_SBPB; + return; + } =20 if (has_microcode) { /* * Zen1/2 with SMT off aren't vulnerable after the right * IBPB microcode has been applied. + * + * Zen1/2 don't have SBPB, no need to try to enable it here. */ if (boot_cpu_data.x86 < 0x19 && !cpu_smt_possible()) { setup_force_cpu_cap(X86_FEATURE_SRSO_NO); @@ -2439,7 +2447,9 @@ static void __init srso_select_mitigation(void) =20 switch (srso_cmd) { case SRSO_CMD_OFF: - goto pred_cmd; + if (boot_cpu_has(X86_FEATURE_SBPB)) + x86_pred_cmd =3D PRED_CMD_SBPB; + return; =20 case SRSO_CMD_MICROCODE: if (has_microcode) { @@ -2501,11 +2511,6 @@ static void __init srso_select_mitigation(void) =20 out: pr_info("%s\n", srso_strings[srso_mitigation]); - -pred_cmd: - if ((!boot_cpu_has_bug(X86_BUG_SRSO) || srso_cmd =3D=3D SRSO_CMD_OFF) && - boot_cpu_has(X86_FEATURE_SBPB)) - x86_pred_cmd =3D PRED_CMD_SBPB; } =20 #undef pr_fmt