From nobody Fri Sep 12 03:04:03 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 73218C001E0 for ; Wed, 9 Aug 2023 19:12:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233098AbjHITMo (ORCPT ); Wed, 9 Aug 2023 15:12:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41218 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233313AbjHITMd (ORCPT ); Wed, 9 Aug 2023 15:12:33 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C989C26AC; Wed, 9 Aug 2023 12:12:20 -0700 (PDT) Date: Wed, 09 Aug 2023 19:12:18 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1691608339; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=iiPqs8GPm5/px3FuMizodThXwGx8sAgJpcHY+VxUGbE=; b=4cxqQSdbtFSzYQMW0G2DjN0WjJW92eKzxSj2k40ZviEpcuKgN63LPvljtA6tuEp4F8Y3Z0 ZaGXYHY+qJePWNcveUVA1QCPft0kxUJS/YV1URNyzySAudX1HKWvgWh+KyVQXQnbz3Faxg IAUt0TDRaXRhkTT3VC6y0u2rgdl92jl12MlubgZ80kvsdy43/EsU7lXEQ21uJU0TglIw2Z ra8nY2NG6HgwvwzvjVGOiDDxQo2lTelPC0JwTcRqo3K7/M+SbwPct85vecNk/OMCpwukcr YuMT5h1cRTpqPzkT1gohiJV5ptgLwzRq+JunkA/JEOl549HEjOB6WwKFezkPdQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1691608339; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=iiPqs8GPm5/px3FuMizodThXwGx8sAgJpcHY+VxUGbE=; b=dGof94KMdwQKkPBxSwoHETj46X2ubxLR8PWV9tV8gUwEfJoOoFG6vDDZyHbE5kXtnCqt+u ALGw4gGmwLVb1vBg== From: "tip-bot2 for Thomas Gleixner" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/apic] x86/apic: Nuke empty init_apic_ldr() callbacks Cc: Thomas Gleixner , Dave Hansen , "Peter Zijlstra (Intel)" , Michael Kelley , Sohil Mehta , Juergen Gross , x86@kernel.org, linux-kernel@vger.kernel.org MIME-Version: 1.0 Message-ID: <169160833872.27769.8916147880580828099.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the x86/apic branch of tip: Commit-ID: 2f6df03f80a13ab2e1eb4bf00bbd5e63255756db Gitweb: https://git.kernel.org/tip/2f6df03f80a13ab2e1eb4bf00bbd5e632= 55756db Author: Thomas Gleixner AuthorDate: Tue, 08 Aug 2023 15:03:58 -07:00 Committer: Dave Hansen CommitterDate: Wed, 09 Aug 2023 11:58:25 -07:00 x86/apic: Nuke empty init_apic_ldr() callbacks apic::init_apic_ldr() is only invoked when the APIC is initialized. So there is really no point in having: - Default empty callbacks all over the place - Two implementations of the actual LDR init function where one is just unreadable gunk but does exactly the same as the other. Make the apic::init_apic_ldr() invocation conditional, remove the empty callbacks and consolidate the two implementation into one. Signed-off-by: Thomas Gleixner Signed-off-by: Dave Hansen Acked-by: Peter Zijlstra (Intel) Tested-by: Michael Kelley Tested-by: Sohil Mehta Tested-by: Juergen Gross # Xen PV (dom0 and unpriv. guest) --- arch/x86/include/asm/apic.h | 2 +-- arch/x86/kernel/apic/apic.c | 7 ++++-- arch/x86/kernel/apic/apic_common.c | 16 ++++++++++++++- arch/x86/kernel/apic/apic_flat_64.c | 32 +--------------------------- arch/x86/kernel/apic/apic_noop.c | 2 +-- arch/x86/kernel/apic/apic_numachip.c | 2 +-- arch/x86/kernel/apic/bigsmp_32.c | 9 +-------- arch/x86/kernel/apic/local.h | 5 +--- arch/x86/kernel/apic/probe_32.c | 15 +------------- arch/x86/kernel/apic/x2apic_phys.c | 5 +---- arch/x86/kernel/apic/x2apic_uv_x.c | 5 +---- arch/x86/xen/apic.c | 1 +- 12 files changed, 24 insertions(+), 77 deletions(-) diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index f6541a2..f8a3631 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -445,8 +445,6 @@ extern void generic_bigsmp_probe(void); =20 #include =20 -#define APIC_DFR_VALUE (APIC_DFR_FLAT) - extern struct apic apic_noop; =20 static inline unsigned int read_apic_id(void) diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index 24912b2..622dd60 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -1578,9 +1578,12 @@ static void setup_local_APIC(void) /* * Intel recommends to set DFR, LDR and TPR before enabling * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel - * document number 292116). So here it goes... + * document number 292116). + * + * Except for APICs which operate in physical destination mode. */ - apic->init_apic_ldr(); + if (apic->init_apic_ldr) + apic->init_apic_ldr(); =20 /* * Set Task Priority to 'accept all except vectors 0-31'. An APIC diff --git a/arch/x86/kernel/apic/apic_common.c b/arch/x86/kernel/apic/apic= _common.c index 41528bb..d55fdb3 100644 --- a/arch/x86/kernel/apic/apic_common.c +++ b/arch/x86/kernel/apic/apic_common.c @@ -6,6 +6,8 @@ #include #include =20 +#include "local.h" + u32 apic_default_calc_apicid(unsigned int cpu) { return per_cpu(x86_cpu_to_apicid, cpu); @@ -39,3 +41,17 @@ int default_apic_id_valid(u32 apicid) { return (apicid < 255); } + +/* + * Set up the logical destination ID when the APIC operates in logical + * destination mode. + */ +void default_init_apic_ldr(void) +{ + unsigned long val; + + apic_write(APIC_DFR, APIC_DFR_FLAT); + val =3D apic_read(APIC_LDR) & ~APIC_LDR_MASK; + val |=3D SET_APIC_LOGICAL_ID(1UL << smp_processor_id()); + apic_write(APIC_LDR, val); +} diff --git a/arch/x86/kernel/apic/apic_flat_64.c b/arch/x86/kernel/apic/api= c_flat_64.c index 00482cf..4ddced9 100644 --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c @@ -28,26 +28,6 @@ static int flat_acpi_madt_oem_check(char *oem_id, char *= oem_table_id) return 1; } =20 -/* - * Set up the logical destination ID. - * - * Intel recommends to set DFR, LDR and TPR before enabling - * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel - * document number 292116). So here it goes... - */ -void flat_init_apic_ldr(void) -{ - unsigned long val; - unsigned long num, id; - - num =3D smp_processor_id(); - id =3D 1UL << num; - apic_write(APIC_DFR, APIC_DFR_FLAT); - val =3D apic_read(APIC_LDR) & ~APIC_LDR_MASK; - val |=3D SET_APIC_LOGICAL_ID(id); - apic_write(APIC_LDR, val); -} - static void _flat_send_IPI_mask(unsigned long mask, int vector) { unsigned long flags; @@ -119,7 +99,7 @@ static struct apic apic_flat __ro_after_init =3D { .disable_esr =3D 0, =20 .check_apicid_used =3D NULL, - .init_apic_ldr =3D flat_init_apic_ldr, + .init_apic_ldr =3D default_init_apic_ldr, .ioapic_phys_id_map =3D NULL, .setup_apic_routing =3D NULL, .cpu_present_to_apicid =3D default_cpu_present_to_apicid, @@ -175,15 +155,6 @@ static int physflat_acpi_madt_oem_check(char *oem_id, = char *oem_table_id) return 0; } =20 -static void physflat_init_apic_ldr(void) -{ - /* - * LDR and DFR are not involved in physflat mode, rather: - * "In physical destination mode, the destination processor is - * specified by its local APIC ID [...]." (Intel SDM, 10.6.2.1) - */ -} - static int physflat_probe(void) { if (apic =3D=3D &apic_physflat || num_possible_cpus() > 8 || @@ -207,7 +178,6 @@ static struct apic apic_physflat __ro_after_init =3D { .disable_esr =3D 0, =20 .check_apicid_used =3D NULL, - .init_apic_ldr =3D physflat_init_apic_ldr, .ioapic_phys_id_map =3D NULL, .setup_apic_routing =3D NULL, .cpu_present_to_apicid =3D default_cpu_present_to_apicid, diff --git a/arch/x86/kernel/apic/apic_noop.c b/arch/x86/kernel/apic/apic_n= oop.c index ccd74e8..dee9e9c 100644 --- a/arch/x86/kernel/apic/apic_noop.c +++ b/arch/x86/kernel/apic/apic_noop.c @@ -14,7 +14,6 @@ =20 #include =20 -static void noop_init_apic_ldr(void) { } static void noop_send_IPI(int cpu, int vector) { } static void noop_send_IPI_mask(const struct cpumask *cpumask, int vector) = { } static void noop_send_IPI_mask_allbutself(const struct cpumask *cpumask, i= nt vector) { } @@ -94,7 +93,6 @@ struct apic apic_noop __ro_after_init =3D { .disable_esr =3D 0, =20 .check_apicid_used =3D default_check_apicid_used, - .init_apic_ldr =3D noop_init_apic_ldr, .ioapic_phys_id_map =3D default_ioapic_phys_id_map, .setup_apic_routing =3D NULL, .cpu_present_to_apicid =3D default_cpu_present_to_apicid, diff --git a/arch/x86/kernel/apic/apic_numachip.c b/arch/x86/kernel/apic/ap= ic_numachip.c index de16fde..d96d74c 100644 --- a/arch/x86/kernel/apic/apic_numachip.c +++ b/arch/x86/kernel/apic/apic_numachip.c @@ -252,7 +252,6 @@ static const struct apic apic_numachip1 __refconst =3D { .disable_esr =3D 0, =20 .check_apicid_used =3D NULL, - .init_apic_ldr =3D flat_init_apic_ldr, .ioapic_phys_id_map =3D NULL, .setup_apic_routing =3D NULL, .cpu_present_to_apicid =3D default_cpu_present_to_apicid, @@ -297,7 +296,6 @@ static const struct apic apic_numachip2 __refconst =3D { .disable_esr =3D 0, =20 .check_apicid_used =3D NULL, - .init_apic_ldr =3D flat_init_apic_ldr, .ioapic_phys_id_map =3D NULL, .setup_apic_routing =3D NULL, .cpu_present_to_apicid =3D default_cpu_present_to_apicid, diff --git a/arch/x86/kernel/apic/bigsmp_32.c b/arch/x86/kernel/apic/bigsmp= _32.c index aba8ce1..c688af4 100644 --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -28,14 +28,6 @@ static bool bigsmp_check_apicid_used(physid_mask_t *map,= int apicid) return false; } =20 -/* - * bigsmp enables physical destination mode - * and doesn't use LDR and DFR - */ -static void bigsmp_init_apic_ldr(void) -{ -} - static void bigsmp_setup_apic_routing(void) { printk(KERN_INFO @@ -108,7 +100,6 @@ static struct apic apic_bigsmp __ro_after_init =3D { .disable_esr =3D 1, =20 .check_apicid_used =3D bigsmp_check_apicid_used, - .init_apic_ldr =3D bigsmp_init_apic_ldr, .ioapic_phys_id_map =3D bigsmp_ioapic_phys_id_map, .setup_apic_routing =3D bigsmp_setup_apic_routing, .cpu_present_to_apicid =3D default_cpu_present_to_apicid, diff --git a/arch/x86/kernel/apic/local.h b/arch/x86/kernel/apic/local.h index ad96c1a..c146741 100644 --- a/arch/x86/kernel/apic/local.h +++ b/arch/x86/kernel/apic/local.h @@ -13,9 +13,6 @@ #include #include =20 -/* APIC flat 64 */ -void flat_init_apic_ldr(void); - /* X2APIC */ int x2apic_apic_id_valid(u32 apicid); int x2apic_apic_id_registered(void); @@ -46,6 +43,8 @@ static inline unsigned int __prepare_ICR(unsigned int sho= rtcut, int vector, return icr; } =20 +void default_init_apic_ldr(void); + void __default_send_IPI_shortcut(unsigned int shortcut, int vector); =20 /* diff --git a/arch/x86/kernel/apic/probe_32.c b/arch/x86/kernel/apic/probe_3= 2.c index 706a844..68fc220 100644 --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -32,21 +32,6 @@ static int default_apic_id_registered(void) return physid_isset(read_apic_id(), phys_cpu_present_map); } =20 -/* - * Set up the logical destination ID. Intel recommends to set DFR, LDR and - * TPR before enabling an APIC. See e.g. "AP-388 82489DX User's Manual" - * (Intel document number 292116). - */ -static void default_init_apic_ldr(void) -{ - unsigned long val; - - apic_write(APIC_DFR, APIC_DFR_VALUE); - val =3D apic_read(APIC_LDR) & ~APIC_LDR_MASK; - val |=3D SET_APIC_LOGICAL_ID(1UL << smp_processor_id()); - apic_write(APIC_LDR, val); -} - static int default_phys_pkg_id(int cpuid_apic, int index_msb) { return cpuid_apic >> index_msb; diff --git a/arch/x86/kernel/apic/x2apic_phys.c b/arch/x86/kernel/apic/x2ap= ic_phys.c index 9cf32ce..c3c2e98 100644 --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c @@ -91,10 +91,6 @@ static void x2apic_send_IPI_all(int vector) __x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLINC); } =20 -static void init_x2apic_ldr(void) -{ -} - static int x2apic_phys_probe(void) { if (!x2apic_mode) @@ -169,7 +165,6 @@ static struct apic apic_x2apic_phys __ro_after_init =3D= { .disable_esr =3D 0, =20 .check_apicid_used =3D NULL, - .init_apic_ldr =3D init_x2apic_ldr, .ioapic_phys_id_map =3D NULL, .setup_apic_routing =3D NULL, .cpu_present_to_apicid =3D default_cpu_present_to_apicid, diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2ap= ic_uv_x.c index 8b14451..ab17e58 100644 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -788,10 +788,6 @@ static int uv_apic_id_registered(void) return 1; } =20 -static void uv_init_apic_ldr(void) -{ -} - static u32 apic_uv_calc_apicid(unsigned int cpu) { return apic_default_calc_apicid(cpu); @@ -841,7 +837,6 @@ static struct apic apic_x2apic_uv_x __ro_after_init =3D= { .disable_esr =3D 0, =20 .check_apicid_used =3D NULL, - .init_apic_ldr =3D uv_init_apic_ldr, .ioapic_phys_id_map =3D NULL, .setup_apic_routing =3D NULL, .cpu_present_to_apicid =3D default_cpu_present_to_apicid, diff --git a/arch/x86/xen/apic.c b/arch/x86/xen/apic.c index c8240af..1ff8f75 100644 --- a/arch/x86/xen/apic.c +++ b/arch/x86/xen/apic.c @@ -149,7 +149,6 @@ static struct apic xen_pv_apic =3D { .disable_esr =3D 0, =20 .check_apicid_used =3D default_check_apicid_used, /* Used on 32-bit */ - .init_apic_ldr =3D xen_noop, /* setup_local_APIC calls it */ .ioapic_phys_id_map =3D default_ioapic_phys_id_map, /* Used on 32-bit */ .setup_apic_routing =3D NULL, .cpu_present_to_apicid =3D xen_cpu_present_to_apicid,