From nobody Mon Feb 9 00:55:31 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA5E5C04FDF for ; Wed, 2 Aug 2023 06:49:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232589AbjHBGtr (ORCPT ); Wed, 2 Aug 2023 02:49:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41632 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232426AbjHBGt0 (ORCPT ); Wed, 2 Aug 2023 02:49:26 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6C46930C4; Tue, 1 Aug 2023 23:48:59 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 76C84201A43; Wed, 2 Aug 2023 08:41:10 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 489692005FA; Wed, 2 Aug 2023 08:41:10 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id B745B1802183; Wed, 2 Aug 2023 14:41:08 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, shawnguo@kernel.org, lpieralisi@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH 1/9] dt-bindings: PCI: fsl,imx6q: Add i.MX6Q and i.MX6QP PCIe EP compatibles Date: Wed, 2 Aug 2023 14:06:43 +0800 Message-Id: <1690956412-2439-2-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1690956412-2439-1-git-send-email-hongxing.zhu@nxp.com> References: <1690956412-2439-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add i.MX6Q and i.MX6QP PCIe EP compatibles. - Make the interrupts property optional, since i.MX6Q/i.MX6QP PCIe don't have DMA capability. - To pass the schema check, specify the clocks property refer to the different platforms. Signed-off-by: Richard Zhu --- .../bindings/pci/fsl,imx6q-pcie-ep.yaml | 31 ++++++++++++++++--- 1 file changed, 27 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml b= /Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml index ee155ed5f181..9b881777c801 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml @@ -19,6 +19,8 @@ description: |+ properties: compatible: enum: + - fsl,imx6q-pcie-ep + - fsl,imx6qp-pcie-ep - fsl,imx8mm-pcie-ep - fsl,imx8mq-pcie-ep - fsl,imx8mp-pcie-ep @@ -46,7 +48,7 @@ properties: =20 interrupts: items: - - description: builtin eDMA interrupter. + - description: builtin eDMA interrupter (optional). =20 interrupt-names: items: @@ -56,8 +58,6 @@ required: - compatible - reg - reg-names - - interrupts - - interrupt-names =20 allOf: - $ref: /schemas/pci/snps,dw-pcie-ep.yaml# @@ -77,7 +77,30 @@ allOf: - const: pcie_bus - const: pcie_phy - const: pcie_aux - else: + + - if: + properties: + compatible: + enum: + - fsl,imx6q-pcie-ep + - fsl,imx6qp-pcie-ep + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: pcie + - const: pcie_bus + - const: pcie_phy + + - if: + properties: + compatible: + enum: + - fsl,imx8mm-pcie-ep + - fsl,imx8mp-pcie-ep + then: properties: clocks: maxItems: 3 --=20 2.34.1 From nobody Mon Feb 9 00:55:31 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C494C001DE for ; Wed, 2 Aug 2023 06:50:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232535AbjHBGuE (ORCPT ); Wed, 2 Aug 2023 02:50:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232493AbjHBGt1 (ORCPT ); Wed, 2 Aug 2023 02:49:27 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 760B130C7; Tue, 1 Aug 2023 23:48:59 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 91745201A62; Wed, 2 Aug 2023 08:41:11 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 64ED0201A57; Wed, 2 Aug 2023 08:41:11 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id C85B01820F57; Wed, 2 Aug 2023 14:41:09 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, shawnguo@kernel.org, lpieralisi@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH 2/9] dt-bindings: PCI: fsl,imx6q: Add i.MX6SX PCIe EP compatibles Date: Wed, 2 Aug 2023 14:06:44 +0800 Message-Id: <1690956412-2439-3-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1690956412-2439-1-git-send-email-hongxing.zhu@nxp.com> References: <1690956412-2439-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add i.MX6SX PCIe EP compatibles. Signed-off-by: Richard Zhu --- .../bindings/pci/fsl,imx6q-pcie-ep.yaml | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml b= /Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml index 9b881777c801..26448084340a 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml @@ -21,6 +21,7 @@ properties: enum: - fsl,imx6q-pcie-ep - fsl,imx6qp-pcie-ep + - fsl,imx6sx-pcie-ep - fsl,imx8mm-pcie-ep - fsl,imx8mq-pcie-ep - fsl,imx8mp-pcie-ep @@ -62,6 +63,22 @@ required: allOf: - $ref: /schemas/pci/snps,dw-pcie-ep.yaml# - $ref: /schemas/pci/fsl,imx6q-pcie-common.yaml# + - if: + properties: + compatible: + enum: + - fsl,imx6sx-pcie-ep + then: + properties: + clocks: + minItems: 4 + clock-names: + items: + - const: pcie + - const: pcie_bus + - const: pcie_phy + - const: pcie_inbound_axi + - if: properties: compatible: --=20 2.34.1 From nobody Mon Feb 9 00:55:31 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8706BC41513 for ; Wed, 2 Aug 2023 06:49:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232626AbjHBGtw (ORCPT ); Wed, 2 Aug 2023 02:49:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41644 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232489AbjHBGt0 (ORCPT ); Wed, 2 Aug 2023 02:49:26 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A0D1430C6; Tue, 1 Aug 2023 23:48:59 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 61F85201A47; Wed, 2 Aug 2023 08:41:12 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 2A291201A56; Wed, 2 Aug 2023 08:41:12 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id E4A081802183; Wed, 2 Aug 2023 14:41:10 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, shawnguo@kernel.org, lpieralisi@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH 3/9] dt-bindings: PCI: fsl,imx6q: Add i.MX7D PCIe EP compatibles Date: Wed, 2 Aug 2023 14:06:45 +0800 Message-Id: <1690956412-2439-4-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1690956412-2439-1-git-send-email-hongxing.zhu@nxp.com> References: <1690956412-2439-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add i.MX7D PCIe EP compatibles. Signed-off-by: Richard Zhu --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml b= /Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml index 26448084340a..e8518642ba9b 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml @@ -22,6 +22,7 @@ properties: - fsl,imx6q-pcie-ep - fsl,imx6qp-pcie-ep - fsl,imx6sx-pcie-ep + - fsl,imx7d-pcie-ep - fsl,imx8mm-pcie-ep - fsl,imx8mq-pcie-ep - fsl,imx8mp-pcie-ep @@ -101,6 +102,7 @@ allOf: enum: - fsl,imx6q-pcie-ep - fsl,imx6qp-pcie-ep + - fsl,imx7d-pcie-ep then: properties: clocks: --=20 2.34.1 From nobody Mon Feb 9 00:55:31 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6E90C001DE for ; Wed, 2 Aug 2023 06:47:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232482AbjHBGrf (ORCPT ); Wed, 2 Aug 2023 02:47:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40040 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231824AbjHBGrU (ORCPT ); Wed, 2 Aug 2023 02:47:20 -0400 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2B1DDC; Tue, 1 Aug 2023 23:47:16 -0700 (PDT) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 555461A0EAD; Wed, 2 Aug 2023 08:41:14 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 1D8461A0E8F; Wed, 2 Aug 2023 08:41:14 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 0A82C1820F56; Wed, 2 Aug 2023 14:41:11 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, shawnguo@kernel.org, lpieralisi@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH 4/9] arm: dts: nxp: Add i.MX6QDL and i.MX6QP PCIe EP supports Date: Wed, 2 Aug 2023 14:06:46 +0800 Message-Id: <1690956412-2439-5-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1690956412-2439-1-git-send-email-hongxing.zhu@nxp.com> References: <1690956412-2439-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add i.MX6QDL and i.MX6QP PCIe EP supports. Signed-off-by: Richard Zhu --- arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/nxp/imx/imx6qp.dtsi | 4 ++++ 2 files changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi b/arch/arm/boot/dts/nxp= /imx/imx6qdl.dtsi index bda182edc589..be02f7882c68 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi @@ -289,6 +289,20 @@ pcie: pcie@1ffc000 { status =3D "disabled"; }; =20 + pcie_ep: pcie-ep@1ffc000 { + compatible =3D "fsl,imx6q-pcie-ep"; + reg =3D <0x01ffc000 0x04000>, <0x01000000 0xf00000>; + reg-names =3D "dbi", "addr_space"; + num-lanes =3D <1>; + clocks =3D <&clks IMX6QDL_CLK_PCIE_AXI>, + <&clks IMX6QDL_CLK_LVDS1_GATE>, + <&clks IMX6QDL_CLK_PCIE_REF_125M>; + clock-names =3D "pcie", "pcie_bus", "pcie_phy"; + num-ib-windows =3D <4>; + num-ob-windows =3D <4>; + status =3D "disabled"; + }; + aips1: bus@2000000 { /* AIPS1 */ compatible =3D "fsl,aips-bus", "simple-bus"; #address-cells =3D <1>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qp.dtsi b/arch/arm/boot/dts/nxp/= imx/imx6qp.dtsi index fc164991d2ae..4ca53a4c254c 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qp.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qp.dtsi @@ -118,3 +118,7 @@ &mmdc0 { &pcie { compatible =3D "fsl,imx6qp-pcie"; }; + +&pcie_ep { + compatible =3D "fsl,imx6qp-pcie-ep"; +}; --=20 2.34.1 From nobody Mon Feb 9 00:55:31 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B31AC001DE for ; Wed, 2 Aug 2023 06:50:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232627AbjHBGuU (ORCPT ); Wed, 2 Aug 2023 02:50:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41586 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231620AbjHBGta (ORCPT ); Wed, 2 Aug 2023 02:49:30 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1C23D2735; Tue, 1 Aug 2023 23:49:12 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id DAFF7201A3D; Wed, 2 Aug 2023 08:41:14 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id ACB58200E7D; Wed, 2 Aug 2023 08:41:14 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 1CDC11820F57; Wed, 2 Aug 2023 14:41:13 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, shawnguo@kernel.org, lpieralisi@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH 5/9] arm: dts: nxp: Add i.MX6SX PCIe EP support Date: Wed, 2 Aug 2023 14:06:47 +0800 Message-Id: <1690956412-2439-6-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1690956412-2439-1-git-send-email-hongxing.zhu@nxp.com> References: <1690956412-2439-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add i.MX6SX PCIe EP support. Signed-off-by: Richard Zhu --- arch/arm/boot/dts/nxp/imx/imx6sx.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/= imx/imx6sx.dtsi index 3a4308666552..fc3a73b408d0 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi @@ -1465,5 +1465,22 @@ pcie: pcie@8ffc000 { power-domain-names =3D "pcie", "pcie_phy"; status =3D "disabled"; }; + + pcie_ep: pcie-ep@8ffc000 { + compatible =3D "fsl,imx6sx-pcie-ep"; + reg =3D <0x08ffc000 0x04000>, <0x08000000 0xf00000>; + reg-names =3D "dbi", "addr_space"; + num-lanes =3D <1>; + clocks =3D <&clks IMX6SX_CLK_PCIE_AXI>, + <&clks IMX6SX_CLK_LVDS1_OUT>, + <&clks IMX6SX_CLK_PCIE_REF_125M>, + <&clks IMX6SX_CLK_DISPLAY_AXI>; + clock-names =3D "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi"; + power-domains =3D <&pd_disp>, <&pd_pci>; + power-domain-names =3D "pcie", "pcie_phy"; + num-ib-windows =3D <4>; + num-ob-windows =3D <4>; + status =3D "disabled"; + }; }; }; --=20 2.34.1 From nobody Mon Feb 9 00:55:31 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29F91C04FE2 for ; Wed, 2 Aug 2023 06:47:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232433AbjHBGrZ (ORCPT ); Wed, 2 Aug 2023 02:47:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40036 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231466AbjHBGrU (ORCPT ); Wed, 2 Aug 2023 02:47:20 -0400 X-Greylist: delayed 365 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Tue, 01 Aug 2023 23:47:16 PDT Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4150A1FF3; Tue, 1 Aug 2023 23:47:16 -0700 (PDT) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 12E0F1A0E8F; Wed, 2 Aug 2023 08:41:16 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id CF3E11A0EAE; Wed, 2 Aug 2023 08:41:15 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 39F4F1802183; Wed, 2 Aug 2023 14:41:14 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, shawnguo@kernel.org, lpieralisi@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH 6/9] arm: dts: nxp: Add i.MX7D PCIe EP support Date: Wed, 2 Aug 2023 14:06:48 +0800 Message-Id: <1690956412-2439-7-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1690956412-2439-1-git-send-email-hongxing.zhu@nxp.com> References: <1690956412-2439-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add i.MX7D PCIe EP support. Signed-off-by: Richard Zhu --- arch/arm/boot/dts/nxp/imx/imx7d.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/boot/dts/nxp/imx/imx7d.dtsi b/arch/arm/boot/dts/nxp/i= mx/imx7d.dtsi index 4b94b8afb55d..135684f17a20 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7d.dtsi @@ -156,6 +156,33 @@ pcie: pcie@33800000 { fsl,imx7d-pcie-phy =3D <&pcie_phy>; status =3D "disabled"; }; + + pcie_ep: pcie-ep@33800000 { + compatible =3D "fsl,imx7d-pcie-ep"; + reg =3D <0x33800000 0x4000>, + <0x40000000 0x10000000>; + reg-names =3D "dbi", "addr_space"; + num-lanes =3D <1>; + clocks =3D <&clks IMX7D_PCIE_CTRL_ROOT_CLK>, + <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>, + <&clks IMX7D_PCIE_PHY_ROOT_CLK>; + clock-names =3D "pcie", "pcie_bus", "pcie_phy"; + assigned-clocks =3D <&clks IMX7D_PCIE_CTRL_ROOT_SRC>, + <&clks IMX7D_PCIE_PHY_ROOT_SRC>; + assigned-clock-parents =3D <&clks IMX7D_PLL_ENET_MAIN_250M_CLK>, + <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; + + fsl,max-link-speed =3D <2>; + power-domains =3D <&pgc_pcie_phy>; + resets =3D <&src IMX7_RESET_PCIEPHY>, + <&src IMX7_RESET_PCIE_CTRL_APPS_EN>, + <&src IMX7_RESET_PCIE_CTRL_APPS_TURNOFF>; + reset-names =3D "pciephy", "apps", "turnoff"; + fsl,imx7d-pcie-phy =3D <&pcie_phy>; + num-ib-windows =3D <4>; + num-ob-windows =3D <4>; + status =3D "disabled"; + }; }; }; =20 --=20 2.34.1 From nobody Mon Feb 9 00:55:31 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 839B9C001DE for ; Wed, 2 Aug 2023 06:50:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231862AbjHBGuH (ORCPT ); Wed, 2 Aug 2023 02:50:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41662 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232496AbjHBGt1 (ORCPT ); Wed, 2 Aug 2023 02:49:27 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 173A8FB; Tue, 1 Aug 2023 23:49:00 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 5216B201A44; Wed, 2 Aug 2023 08:41:17 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id E3CAE201A39; Wed, 2 Aug 2023 08:41:16 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 5C6281800319; Wed, 2 Aug 2023 14:41:15 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, shawnguo@kernel.org, lpieralisi@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH 7/9] PCI: imx6: Add i.MX6Q and i.MX6QP PCIe EP supports Date: Wed, 2 Aug 2023 14:06:49 +0800 Message-Id: <1690956412-2439-8-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1690956412-2439-1-git-send-email-hongxing.zhu@nxp.com> References: <1690956412-2439-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add i.MX6Q and i.MX6QP PCIe EP supports. Signed-off-by: Richard Zhu --- drivers/pci/controller/dwc/pci-imx6.c | 61 ++++++++++++++++++++++++++- 1 file changed, 60 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller= /dwc/pci-imx6.c index 27aaa2a6bf39..4da9553b49b4 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -46,8 +46,10 @@ =20 enum imx6_pcie_variants { IMX6Q, + IMX6Q_EP, IMX6SX, IMX6QP, + IMX6QP_EP, IMX7D, IMX8MQ, IMX8MM, @@ -567,7 +569,9 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *i= mx6_pcie) IMX6SX_GPR12_PCIE_TEST_POWERDOWN, 0); break; case IMX6QP: + case IMX6QP_EP: case IMX6Q: + case IMX6Q_EP: /* power up core phy and enable ref clock */ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18); @@ -619,7 +623,9 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie = *imx6_pcie) clk_disable_unprepare(imx6_pcie->pcie_inbound_axi); break; case IMX6QP: + case IMX6QP_EP: case IMX6Q: + case IMX6Q_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_REF_CLK_EN, 0); regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, @@ -720,11 +726,13 @@ static void imx6_pcie_assert_core_reset(struct imx6_p= cie *imx6_pcie) IMX6SX_GPR5_PCIE_BTNRST_RESET); break; case IMX6QP: + case IMX6QP_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_SW_RST, IMX6Q_GPR1_PCIE_SW_RST); break; case IMX6Q: + case IMX6Q_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_TEST_PD, 1 << 18); regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, @@ -777,12 +785,14 @@ static int imx6_pcie_deassert_core_reset(struct imx6_= pcie *imx6_pcie) IMX6SX_GPR5_PCIE_BTNRST_RESET, 0); break; case IMX6QP: + case IMX6QP_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_SW_RST, 0); =20 usleep_range(200, 500); break; case IMX6Q: /* Nothing to do */ + case IMX6Q_EP: case IMX8MM: case IMX8MM_EP: case IMX8MP: @@ -827,8 +837,10 @@ static void imx6_pcie_ltssm_enable(struct device *dev) =20 switch (imx6_pcie->drvdata->variant) { case IMX6Q: + case IMX6Q_EP: case IMX6SX: case IMX6QP: + case IMX6QP_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6Q_GPR12_PCIE_CTL_2, IMX6Q_GPR12_PCIE_CTL_2); @@ -851,8 +863,10 @@ static void imx6_pcie_ltssm_disable(struct device *dev) =20 switch (imx6_pcie->drvdata->variant) { case IMX6Q: + case IMX6Q_EP: case IMX6SX: case IMX6QP: + case IMX6QP_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6Q_GPR12_PCIE_CTL_2, 0); break; @@ -1077,6 +1091,27 @@ static int imx6_pcie_ep_raise_irq(struct dw_pcie_ep = *ep, u8 func_no, return 0; } =20 +/* + * i.MX6Q and i.MX6QP PCIe EP BAR definitions. + * +-----------------------------------------------------------------+ + * | BAR0 | BAR1 | BAR2 | BAR3 | BAR4 | BAR5 | + * +----------|----------|----------|----------|----------|----------+ + * | 64-bit | Disabled | 32-bit | 32-bit | Disabled | Disabled | + * | | | | Fixed | | | + * | | | | 256Bytes | | | + * | Prefetch | | Prefetch | None- | | | + * | Memory | | Memory | Prefetch | | | + * | | | | IO | | | + * +-----------------------------------------------------------------+ + */ +static const struct pci_epc_features imx6q_pcie_epc_features =3D { + .linkup_notifier =3D false, + .msi_capable =3D true, + .msix_capable =3D false, + .reserved_bar =3D 1 << BAR_4 | 1 << BAR_5, + .align =3D SZ_64K, +}; + static const struct pci_epc_features imx8m_pcie_epc_features =3D { .linkup_notifier =3D false, .msi_capable =3D true, @@ -1088,7 +1123,16 @@ static const struct pci_epc_features imx8m_pcie_epc_= features =3D { static const struct pci_epc_features* imx6_pcie_ep_get_features(struct dw_pcie_ep *ep) { - return &imx8m_pcie_epc_features; + struct dw_pcie *pci =3D to_dw_pcie_from_ep(ep); + struct imx6_pcie *imx6_pcie =3D to_imx6_pcie(pci); + + switch (imx6_pcie->drvdata->variant) { + case IMX6Q_EP: + case IMX6QP_EP: + return &imx6q_pcie_epc_features; + default: + return &imx8m_pcie_epc_features; + } } =20 static const struct dw_pcie_ep_ops pcie_ep_ops =3D { @@ -1157,6 +1201,7 @@ static void imx6_pcie_pm_turnoff(struct imx6_pcie *im= x6_pcie) switch (imx6_pcie->drvdata->variant) { case IMX6SX: case IMX6QP: + case IMX6QP_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF, IMX6SX_GPR12_PCIE_PM_TURN_OFF); @@ -1478,6 +1523,12 @@ static const struct imx6_pcie_drvdata drvdata[] =3D { .dbi_length =3D 0x200, .gpr =3D "fsl,imx6q-iomuxc-gpr", }, + [IMX6Q_EP] =3D { + .variant =3D IMX6Q_EP, + .mode =3D DW_PCIE_EP_TYPE, + .flags =3D IMX6_PCIE_FLAG_IMX6_PHY, + .gpr =3D "fsl,imx6q-iomuxc-gpr", + }, [IMX6SX] =3D { .variant =3D IMX6SX, .flags =3D IMX6_PCIE_FLAG_IMX6_PHY | @@ -1493,6 +1544,12 @@ static const struct imx6_pcie_drvdata drvdata[] =3D { .dbi_length =3D 0x200, .gpr =3D "fsl,imx6q-iomuxc-gpr", }, + [IMX6QP_EP] =3D { + .variant =3D IMX6QP_EP, + .mode =3D DW_PCIE_EP_TYPE, + .flags =3D IMX6_PCIE_FLAG_IMX6_PHY, + .gpr =3D "fsl,imx6q-iomuxc-gpr", + }, [IMX7D] =3D { .variant =3D IMX7D, .flags =3D IMX6_PCIE_FLAG_SUPPORTS_SUSPEND, @@ -1531,8 +1588,10 @@ static const struct imx6_pcie_drvdata drvdata[] =3D { =20 static const struct of_device_id imx6_pcie_of_match[] =3D { { .compatible =3D "fsl,imx6q-pcie", .data =3D &drvdata[IMX6Q], }, + { .compatible =3D "fsl,imx6q-pcie-ep", .data =3D &drvdata[IMX6Q_EP], }, { .compatible =3D "fsl,imx6sx-pcie", .data =3D &drvdata[IMX6SX], }, { .compatible =3D "fsl,imx6qp-pcie", .data =3D &drvdata[IMX6QP], }, + { .compatible =3D "fsl,imx6qp-pcie-ep", .data =3D &drvdata[IMX6QP_EP], }, { .compatible =3D "fsl,imx7d-pcie", .data =3D &drvdata[IMX7D], }, { .compatible =3D "fsl,imx8mq-pcie", .data =3D &drvdata[IMX8MQ], }, { .compatible =3D "fsl,imx8mm-pcie", .data =3D &drvdata[IMX8MM], }, --=20 2.34.1 From nobody Mon Feb 9 00:55:31 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A0FCC001DE for ; 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Wed, 2 Aug 2023 14:41:16 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, shawnguo@kernel.org, lpieralisi@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH 8/9] PCI: imx6: Add i.MX6SX PCIe EP support Date: Wed, 2 Aug 2023 14:06:50 +0800 Message-Id: <1690956412-2439-9-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1690956412-2439-1-git-send-email-hongxing.zhu@nxp.com> References: <1690956412-2439-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add the i.MX6SX PCIe EP support. Signed-off-by: Richard Zhu --- drivers/pci/controller/dwc/pci-imx6.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller= /dwc/pci-imx6.c index 4da9553b49b4..bcc83c9d0ec5 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -48,6 +48,7 @@ enum imx6_pcie_variants { IMX6Q, IMX6Q_EP, IMX6SX, + IMX6SX_EP, IMX6QP, IMX6QP_EP, IMX7D, @@ -361,6 +362,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_p= cie) IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, 0); break; case IMX6SX: + case IMX6SX_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_RX_EQ_MASK, IMX6SX_GPR12_PCIE_RX_EQ_2); @@ -559,6 +561,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *i= mx6_pcie) =20 switch (imx6_pcie->drvdata->variant) { case IMX6SX: + case IMX6SX_EP: ret =3D clk_prepare_enable(imx6_pcie->pcie_inbound_axi); if (ret) { dev_err(dev, "unable to enable pcie_axi clock\n"); @@ -620,6 +623,7 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie = *imx6_pcie) { switch (imx6_pcie->drvdata->variant) { case IMX6SX: + case IMX6SX_EP: clk_disable_unprepare(imx6_pcie->pcie_inbound_axi); break; case IMX6QP: @@ -717,6 +721,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pci= e *imx6_pcie) reset_control_assert(imx6_pcie->apps_reset); break; case IMX6SX: + case IMX6SX_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_TEST_POWERDOWN, IMX6SX_GPR12_PCIE_TEST_POWERDOWN); @@ -781,6 +786,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pc= ie *imx6_pcie) imx7d_pcie_wait_for_phy_pll_lock(imx6_pcie); break; case IMX6SX: + case IMX6SX_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5, IMX6SX_GPR5_PCIE_BTNRST_RESET, 0); break; @@ -839,6 +845,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev) case IMX6Q: case IMX6Q_EP: case IMX6SX: + case IMX6SX_EP: case IMX6QP: case IMX6QP_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, @@ -865,6 +872,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev) case IMX6Q: case IMX6Q_EP: case IMX6SX: + case IMX6SX_EP: case IMX6QP: case IMX6QP_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, @@ -1200,6 +1208,7 @@ static void imx6_pcie_pm_turnoff(struct imx6_pcie *im= x6_pcie) /* Others poke directly at IOMUXC registers */ switch (imx6_pcie->drvdata->variant) { case IMX6SX: + case IMX6SX_EP: case IMX6QP: case IMX6QP_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, @@ -1363,6 +1372,7 @@ static int imx6_pcie_probe(struct platform_device *pd= ev) =20 switch (imx6_pcie->drvdata->variant) { case IMX6SX: + case IMX6SX_EP: imx6_pcie->pcie_inbound_axi =3D devm_clk_get(dev, "pcie_inbound_axi"); if (IS_ERR(imx6_pcie->pcie_inbound_axi)) @@ -1536,6 +1546,12 @@ static const struct imx6_pcie_drvdata drvdata[] =3D { IMX6_PCIE_FLAG_SUPPORTS_SUSPEND, .gpr =3D "fsl,imx6q-iomuxc-gpr", }, + [IMX6SX_EP] =3D { + .variant =3D IMX6SX_EP, + .mode =3D DW_PCIE_EP_TYPE, + .flags =3D IMX6_PCIE_FLAG_IMX6_PHY, + .gpr =3D "fsl,imx6q-iomuxc-gpr", + }, [IMX6QP] =3D { .variant =3D IMX6QP, .flags =3D IMX6_PCIE_FLAG_IMX6_PHY | @@ -1590,6 +1606,7 @@ static const struct of_device_id imx6_pcie_of_match[]= =3D { { .compatible =3D "fsl,imx6q-pcie", .data =3D &drvdata[IMX6Q], }, { .compatible =3D "fsl,imx6q-pcie-ep", .data =3D &drvdata[IMX6Q_EP], }, { .compatible =3D "fsl,imx6sx-pcie", .data =3D &drvdata[IMX6SX], }, + { .compatible =3D "fsl,imx6sx-pcie-ep", .data =3D &drvdata[IMX6SX_EP], }, { .compatible =3D "fsl,imx6qp-pcie", .data =3D &drvdata[IMX6QP], }, { .compatible =3D "fsl,imx6qp-pcie-ep", .data =3D &drvdata[IMX6QP_EP], }, { .compatible =3D "fsl,imx7d-pcie", .data =3D &drvdata[IMX7D], }, --=20 2.34.1 From nobody Mon Feb 9 00:55:31 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 689D4C04A94 for ; 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Wed, 2 Aug 2023 14:41:17 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, shawnguo@kernel.org, lpieralisi@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH 9/9] PCI: imx6: Add i.MX7D PCIe EP support Date: Wed, 2 Aug 2023 14:06:51 +0800 Message-Id: <1690956412-2439-10-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1690956412-2439-1-git-send-email-hongxing.zhu@nxp.com> References: <1690956412-2439-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add the i.MX7D PCIe EP mode support. Signed-off-by: Richard Zhu --- drivers/pci/controller/dwc/pci-imx6.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller= /dwc/pci-imx6.c index bcc83c9d0ec5..c1b9cc065963 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -52,6 +52,7 @@ enum imx6_pcie_variants { IMX6QP, IMX6QP_EP, IMX7D, + IMX7D_EP, IMX8MQ, IMX8MM, IMX8MP, @@ -358,6 +359,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_p= cie) 0); break; case IMX7D: + case IMX7D_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, 0); break; @@ -589,6 +591,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *i= mx6_pcie) IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16); break; case IMX7D: + case IMX7D_EP: break; case IMX8MM: case IMX8MM_EP: @@ -637,6 +640,7 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie = *imx6_pcie) IMX6Q_GPR1_PCIE_TEST_PD); break; case IMX7D: + case IMX7D_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, IMX7D_GPR12_PCIE_PHY_REFCLK_SEL); @@ -710,6 +714,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pci= e *imx6_pcie) { switch (imx6_pcie->drvdata->variant) { case IMX7D: + case IMX7D_EP: case IMX8MQ: case IMX8MQ_EP: reset_control_assert(imx6_pcie->pciephy_reset); @@ -762,6 +767,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pc= ie *imx6_pcie) reset_control_deassert(imx6_pcie->pciephy_reset); break; case IMX7D: + case IMX7D_EP: reset_control_deassert(imx6_pcie->pciephy_reset); =20 /* Workaround for ERR010728, failure of PCI-e PLL VCO to @@ -853,6 +859,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev) IMX6Q_GPR12_PCIE_CTL_2); break; case IMX7D: + case IMX7D_EP: case IMX8MQ: case IMX8MQ_EP: case IMX8MM: @@ -879,6 +886,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev) IMX6Q_GPR12_PCIE_CTL_2, 0); break; case IMX7D: + case IMX7D_EP: case IMX8MQ: case IMX8MQ_EP: case IMX8MM: @@ -1387,6 +1395,7 @@ static int imx6_pcie_probe(struct platform_device *pd= ev) "pcie_aux clock source missing or invalid\n"); fallthrough; case IMX7D: + case IMX7D_EP: if (dbi_base->start =3D=3D IMX8MQ_PCIE2_BASE_ADDR) imx6_pcie->controller_id =3D 1; =20 @@ -1571,6 +1580,11 @@ static const struct imx6_pcie_drvdata drvdata[] =3D { .flags =3D IMX6_PCIE_FLAG_SUPPORTS_SUSPEND, .gpr =3D "fsl,imx7d-iomuxc-gpr", }, + [IMX7D_EP] =3D { + .variant =3D IMX7D_EP, + .mode =3D DW_PCIE_EP_TYPE, + .gpr =3D "fsl,imx7d-iomuxc-gpr", + }, [IMX8MQ] =3D { .variant =3D IMX8MQ, .gpr =3D "fsl,imx8mq-iomuxc-gpr", @@ -1610,6 +1624,7 @@ static const struct of_device_id imx6_pcie_of_match[]= =3D { { .compatible =3D "fsl,imx6qp-pcie", .data =3D &drvdata[IMX6QP], }, { .compatible =3D "fsl,imx6qp-pcie-ep", .data =3D &drvdata[IMX6QP_EP], }, { .compatible =3D "fsl,imx7d-pcie", .data =3D &drvdata[IMX7D], }, + { .compatible =3D "fsl,imx7d-pcie-ep", .data =3D &drvdata[IMX7D_EP], }, { .compatible =3D "fsl,imx8mq-pcie", .data =3D &drvdata[IMX8MQ], }, { .compatible =3D "fsl,imx8mm-pcie", .data =3D &drvdata[IMX8MM], }, { .compatible =3D "fsl,imx8mp-pcie", .data =3D &drvdata[IMX8MP], }, --=20 2.34.1