From nobody Sun Feb 8 17:46:33 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 50554C001DC for ; Mon, 31 Jul 2023 10:19:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232405AbjGaKTo (ORCPT ); Mon, 31 Jul 2023 06:19:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54726 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231845AbjGaKTe (ORCPT ); Mon, 31 Jul 2023 06:19:34 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4A089A6; Mon, 31 Jul 2023 03:19:33 -0700 (PDT) Date: Mon, 31 Jul 2023 10:19:31 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690798771; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/BJ75LvzBavcvQ5QWgiVoQZjevfUet52nbGsiOKDv1M=; b=bM0TntVmrJ71+cH6Y4HITxChw+jZt851IO/m8OEE4bStWEwSQe7LIaX3OAVgQiQDkRJQAX y+NJkHKSZlbe+ECTf/WFh01I1tThkJvYvkMX/Vj0TAbRgUJ+ssHFLw2T1X5aJR93s4Si4a SECI/iW5KYwDUdSRcT8P8Y6jUrQ04RUizc15NoW3c6LwE1ZQXHcePVYQx9Be+dizG4B2Ax Yshk0XaWtbai8gfozUdL8xtVUOKzIhJQkhGcJW0IeaEQNMN2caCw68p0GOCxPoVu/npeJc 9LW9vHHUNpSnoZD86/UQk6GOy41Wfp79Yq2LW/gM4U2BtLKFRHBWI1aJTC60iQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690798771; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/BJ75LvzBavcvQ5QWgiVoQZjevfUet52nbGsiOKDv1M=; b=ZwC5QBhPo2CdPPqmjedZ63R/b41w21lxN0vgco4845ybVEc/2HCV1nE6wr3lQzoVdbEM4l XwOCz7fWoScD0eDA== From: "tip-bot2 for James Clark" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: perf/core] perf/x86: Remove unused PERF_PMU_CAP_HETEROGENEOUS_CPUS capability Cc: James Clark , "Peter Zijlstra (Intel)" , Ian Rogers , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20230724134500.970496-3-james.clark@arm.com> References: <20230724134500.970496-3-james.clark@arm.com> MIME-Version: 1.0 Message-ID: <169079877138.28540.11383129464821949118.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the perf/core branch of tip: Commit-ID: 4b36873b4a3455590f686903c354c4716e149c74 Gitweb: https://git.kernel.org/tip/4b36873b4a3455590f686903c354c4716= e149c74 Author: James Clark AuthorDate: Mon, 24 Jul 2023 14:44:57 +01:00 Committer: Peter Zijlstra CommitterDate: Wed, 26 Jul 2023 12:28:46 +02:00 perf/x86: Remove unused PERF_PMU_CAP_HETEROGENEOUS_CPUS capability Since commit bd2756811766 ("perf: Rewrite core context handling") the relationship between perf_event_context and PMUs has changed so that the error scenario that PERF_PMU_CAP_HETEROGENEOUS_CPUS originally silenced no longer exists. Remove the capability to avoid confusion that it actually influences any perf core behavior. This change should be a no-op. Signed-off-by: James Clark Signed-off-by: Peter Zijlstra (Intel) Acked-by: Ian Rogers Link: https://lore.kernel.org/r/20230724134500.970496-3-james.clark@arm.com --- arch/x86/events/core.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c index 23c9642..185f902 100644 --- a/arch/x86/events/core.c +++ b/arch/x86/events/core.c @@ -2166,7 +2166,6 @@ static int __init init_hw_perf_events(void) hybrid_pmu->pmu =3D pmu; hybrid_pmu->pmu.type =3D -1; hybrid_pmu->pmu.attr_update =3D x86_pmu.attr_update; - hybrid_pmu->pmu.capabilities |=3D PERF_PMU_CAP_HETEROGENEOUS_CPUS; hybrid_pmu->pmu.capabilities |=3D PERF_PMU_CAP_EXTENDED_HW_TYPE; =20 err =3D perf_pmu_register(&hybrid_pmu->pmu, hybrid_pmu->name,