From nobody Mon Feb 9 04:02:51 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E85E7C0015E for ; Fri, 28 Jul 2023 07:58:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234661AbjG1H6d (ORCPT ); Fri, 28 Jul 2023 03:58:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41568 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234552AbjG1H56 (ORCPT ); Fri, 28 Jul 2023 03:57:58 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 740603584; Fri, 28 Jul 2023 00:57:56 -0700 (PDT) Date: Fri, 28 Jul 2023 07:57:54 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690531075; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PrZQaTyqf16Vk1Bp57+1OcO8ffAip0BSduKvePpXECI=; b=G+D0u944HDJ+BLF91ITXpzSoBsPr4Dlpr5zCw1qfA1NWO8dlUge4LsIn8lZc0aDlwpW2PY QObCLuoiyOjoutr1Kwh96od58lMLWzihUKTEtoNGVKTxHqRztPRfV360kW49Z0GzXc8zBI G05gvu8UZGpDz18Beze8utQCWE2+vhmb26DYTKSpLDvAVbhBue+ph+0/hAeHbAFFskHG+2 jpoPyl6HYZPm0ZJcXYNerSbJliMXbAt9BIH3RKl6WPOrEghL3v0xCn0Je2YnVELZ1zDB02 ORtsky7ifKa0W+ROPPV86lR5SV+iEamBOpDWzMfaWlMK1HMRaWTjRsOiko6t0w== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690531075; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PrZQaTyqf16Vk1Bp57+1OcO8ffAip0BSduKvePpXECI=; b=jUUYMbJFZlCGEDOO2Yv0MedDwI82k4dDoAnkAAbvPfePQC1NAEghVhQP7Ot7/RhF1jTHfg Yl511IUe4TSXpGCw== From: "tip-bot2 for Michael Ellerman" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: smp/core] cpu/SMT: Store the current/max number of threads Cc: Michael Ellerman , Laurent Dufour , Thomas Gleixner , Zhang Rui , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20230705145143.40545-5-ldufour@linux.ibm.com> References: <20230705145143.40545-5-ldufour@linux.ibm.com> MIME-Version: 1.0 Message-ID: <169053107444.28540.6116396316311383462.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the smp/core branch of tip: Commit-ID: 447ae4ac41130a7f127c2581a5e816bb0800b560 Gitweb: https://git.kernel.org/tip/447ae4ac41130a7f127c2581a5e816bb0= 800b560 Author: Michael Ellerman AuthorDate: Wed, 05 Jul 2023 16:51:37 +02:00 Committer: Thomas Gleixner CommitterDate: Fri, 28 Jul 2023 09:53:37 +02:00 cpu/SMT: Store the current/max number of threads Some architectures allow partial SMT states at boot time, ie. when not all SMT threads are brought online. To support that the SMT code needs to know the maximum number of SMT threads, and also the currently configured number. The architecture code knows the max number of threads, so have the architecture code pass that value to cpu_smt_set_num_threads(). Note that although topology_max_smt_threads() exists, it is not configured early enough to be used here. As architecture, like PowerPC, allows the threads number to be set through the kernel command line, also pass that value. [ ldufour: Slightly reword the commit message ] [ ldufour: Rename cpu_smt_check_topology and add a num_threads argument ] Signed-off-by: Michael Ellerman Signed-off-by: Laurent Dufour Signed-off-by: Thomas Gleixner Tested-by: Zhang Rui Link: https://lore.kernel.org/r/20230705145143.40545-5-ldufour@linux.ibm.com --- arch/x86/kernel/cpu/common.c | 2 +- include/linux/cpu_smt.h | 8 ++++++-- kernel/cpu.c | 21 ++++++++++++++++++++- 3 files changed, 27 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 52683fd..12a48a8 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -2317,7 +2317,7 @@ void __init arch_cpu_finalize_init(void) * identify_boot_cpu() initialized SMT support information, let the * core code know. */ - cpu_smt_check_topology(); + cpu_smt_set_num_threads(smp_num_siblings, smp_num_siblings); =20 if (!IS_ENABLED(CONFIG_SMP)) { pr_info("CPU: "); diff --git a/include/linux/cpu_smt.h b/include/linux/cpu_smt.h index 722c2e3..0c16642 100644 --- a/include/linux/cpu_smt.h +++ b/include/linux/cpu_smt.h @@ -12,15 +12,19 @@ enum cpuhp_smt_control { =20 #if defined(CONFIG_SMP) && defined(CONFIG_HOTPLUG_SMT) extern enum cpuhp_smt_control cpu_smt_control; +extern unsigned int cpu_smt_num_threads; extern void cpu_smt_disable(bool force); -extern void cpu_smt_check_topology(void); +extern void cpu_smt_set_num_threads(unsigned int num_threads, + unsigned int max_threads); extern bool cpu_smt_possible(void); extern int cpuhp_smt_enable(void); extern int cpuhp_smt_disable(enum cpuhp_smt_control ctrlval); #else # define cpu_smt_control (CPU_SMT_NOT_IMPLEMENTED) +# define cpu_smt_num_threads 1 static inline void cpu_smt_disable(bool force) { } -static inline void cpu_smt_check_topology(void) { } +static inline void cpu_smt_set_num_threads(unsigned int num_threads, + unsigned int max_threads) { } static inline bool cpu_smt_possible(void) { return false; } static inline int cpuhp_smt_enable(void) { return 0; } static inline int cpuhp_smt_disable(enum cpuhp_smt_control ctrlval) { retu= rn 0; } diff --git a/kernel/cpu.c b/kernel/cpu.c index b6fe170..d7dd535 100644 --- a/kernel/cpu.c +++ b/kernel/cpu.c @@ -594,6 +594,8 @@ void __weak arch_smt_update(void) { } #ifdef CONFIG_HOTPLUG_SMT =20 enum cpuhp_smt_control cpu_smt_control __read_mostly =3D CPU_SMT_ENABLED; +static unsigned int cpu_smt_max_threads __ro_after_init; +unsigned int cpu_smt_num_threads __read_mostly =3D UINT_MAX; =20 void __init cpu_smt_disable(bool force) { @@ -607,16 +609,33 @@ void __init cpu_smt_disable(bool force) pr_info("SMT: disabled\n"); cpu_smt_control =3D CPU_SMT_DISABLED; } + cpu_smt_num_threads =3D 1; } =20 /* * The decision whether SMT is supported can only be done after the full * CPU identification. Called from architecture code. */ -void __init cpu_smt_check_topology(void) +void __init cpu_smt_set_num_threads(unsigned int num_threads, + unsigned int max_threads) { + WARN_ON(!num_threads || (num_threads > max_threads)); + if (!topology_smt_supported()) cpu_smt_control =3D CPU_SMT_NOT_SUPPORTED; + + cpu_smt_max_threads =3D max_threads; + + /* + * If SMT has been disabled via the kernel command line or SMT is + * not supported, set cpu_smt_num_threads to 1 for consistency. + * If enabled, take the architecture requested number of threads + * to bring up into account. + */ + if (cpu_smt_control !=3D CPU_SMT_ENABLED) + cpu_smt_num_threads =3D 1; + else if (num_threads < cpu_smt_num_threads) + cpu_smt_num_threads =3D num_threads; } =20 static int __init smt_cmdline_disable(char *str)