From nobody Sun Feb 8 18:14:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99129C001B0 for ; Wed, 19 Jul 2023 22:48:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231296AbjGSWsk (ORCPT ); Wed, 19 Jul 2023 18:48:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42316 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230409AbjGSWro (ORCPT ); Wed, 19 Jul 2023 18:47:44 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4DC56210B; Wed, 19 Jul 2023 15:47:35 -0700 (PDT) Date: Wed, 19 Jul 2023 22:47:33 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1689806853; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=bjEn3JqcSQo1gJAI2nh37QcddKb+X0YfjVkcDqUbRNE=; b=WVJLfvckgsYf1Hc0dfZS90Leuokjt+X2ZgJ6u7ZK9/IvltI96fj2KJtbstixVjGl4ukqXo yPiMPDyrieXIQEXVhHpV0cYS1tGEmOFSyFweQ1VSb749J6bAggXEEjWSm27tXHqXsC36Kt XanxdqcYBvzVfWT0ucq/Ouezcq5Sz1hqEEXBMiInrKVpH7yOejqSgJb7DnUevw85Q+t3/h n1eFDN6ZGuhFP9fUbK6huSDDTvA1A5Uh7gy5LZN1pUMJX/spdP/ve30F1/cn8+mLv+4CDr QU8eJFMM9J16YeY53eElJxIBmFf0L81uNe9z2TuKSpFmvROxQeofOGXH8SW6UA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1689806853; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=bjEn3JqcSQo1gJAI2nh37QcddKb+X0YfjVkcDqUbRNE=; b=MiafcrqqFlX8u0opRaYwdc/OFNts5yQNAsP82i8AlkbmzyEV7gj0FfuWRb6SzcbbGbexGy ld/H6Ka21jtyUHAw== From: "tip-bot2 for Rick Edgecombe" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/shstk] x86/fpu: Add helper for modifying xstate Cc: Thomas Gleixner , Rick Edgecombe , Dave Hansen , "Borislav Petkov (AMD)" , Kees Cook , "Mike Rapoport (IBM)" , Pengfei Xu , John Allen , x86@kernel.org, linux-kernel@vger.kernel.org MIME-Version: 1.0 Message-ID: <168980685323.28540.16408510205774794327.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the x86/shstk branch of tip: Commit-ID: b89e93a76d9b525b72e5684c8187ab3e83052337 Gitweb: https://git.kernel.org/tip/b89e93a76d9b525b72e5684c8187ab3e8= 3052337 Author: Rick Edgecombe AuthorDate: Mon, 12 Jun 2023 17:10:51 -07:00 Committer: Rick Edgecombe CommitterDate: Tue, 11 Jul 2023 14:12:49 -07:00 x86/fpu: Add helper for modifying xstate Just like user xfeatures, supervisor xfeatures can be active in the registers or present in the task FPU buffer. If the registers are active, the registers can be modified directly. If the registers are not active, the modification must be performed on the task FPU buffer. When the state is not active, the kernel could perform modifications directly to the buffer. But in order for it to do that, it needs to know where in the buffer the specific state it wants to modify is located. Doing this is not robust against optimizations that compact the FPU buffer, as each access would require computing where in the buffer it is. The easiest way to modify supervisor xfeature data is to force restore the registers and write directly to the MSRs. Often times this is just fine anyway as the registers need to be restored before returning to userspace. Do this for now, leaving buffer writing optimizations for the future. Add a new function fpregs_lock_and_load() that can simultaneously call fpregs_lock() and do this restore. Also perform some extra sanity checks in this function since this will be used in non-fpu focused code. Suggested-by: Thomas Gleixner Signed-off-by: Rick Edgecombe Signed-off-by: Dave Hansen Reviewed-by: Borislav Petkov (AMD) Reviewed-by: Kees Cook Acked-by: Mike Rapoport (IBM) Tested-by: Pengfei Xu Tested-by: John Allen Tested-by: Kees Cook Link: https://lore.kernel.org/all/20230613001108.3040476-26-rick.p.edgecomb= e%40intel.com --- arch/x86/include/asm/fpu/api.h | 9 +++++++++ arch/x86/kernel/fpu/core.c | 18 ++++++++++++++++++ 2 files changed, 27 insertions(+) diff --git a/arch/x86/include/asm/fpu/api.h b/arch/x86/include/asm/fpu/api.h index b475d9a..31089b8 100644 --- a/arch/x86/include/asm/fpu/api.h +++ b/arch/x86/include/asm/fpu/api.h @@ -82,6 +82,15 @@ static inline void fpregs_unlock(void) preempt_enable(); } =20 +/* + * FPU state gets lazily restored before returning to userspace. So when i= n the + * kernel, the valid FPU state may be kept in the buffer. This function wi= ll force + * restore all the fpu state to the registers early if needed, and lock th= em from + * being automatically saved/restored. Then FPU state can be modified safe= ly in the + * registers, before unlocking with fpregs_unlock(). + */ +void fpregs_lock_and_load(void); + #ifdef CONFIG_X86_DEBUG_FPU extern void fpregs_assert_state_consistent(void); #else diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c index 1015af1..375852c 100644 --- a/arch/x86/kernel/fpu/core.c +++ b/arch/x86/kernel/fpu/core.c @@ -753,6 +753,24 @@ void switch_fpu_return(void) } EXPORT_SYMBOL_GPL(switch_fpu_return); =20 +void fpregs_lock_and_load(void) +{ + /* + * fpregs_lock() only disables preemption (mostly). So modifying state + * in an interrupt could screw up some in progress fpregs operation. + * Warn about it. + */ + WARN_ON_ONCE(!irq_fpu_usable()); + WARN_ON_ONCE(current->flags & PF_KTHREAD); + + fpregs_lock(); + + fpregs_assert_state_consistent(); + + if (test_thread_flag(TIF_NEED_FPU_LOAD)) + fpregs_restore_userregs(); +} + #ifdef CONFIG_X86_DEBUG_FPU /* * If current FPU state according to its tracking (loaded FPU context on t= his