From nobody Sun Feb 8 16:11:33 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2D4EEB64D7 for ; Fri, 16 Jun 2023 11:25:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345183AbjFPLZh (ORCPT ); Fri, 16 Jun 2023 07:25:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45102 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344692AbjFPLZ3 (ORCPT ); Fri, 16 Jun 2023 07:25:29 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C5D671FF9 for ; Fri, 16 Jun 2023 04:25:28 -0700 (PDT) Date: Fri, 16 Jun 2023 11:25:26 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1686914727; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=G22dwzIlCJuuAAqHAywFRu3WniA79YSRhjQkgApGuTg=; b=gxwRumIME4Z5TsKu9r9aMYNHwy3Z8oSR3UMyxdgw2b1M4SA8/QGnpsJ85KG5S+qg+9gArh O754Y5cICf8okW0LPvD+Tl9l50X+bkLsMqAQkuXcpReuJn1dvNpvU8PuLtMpVLyGa4bFVy jrcuVRIyxBaaYna5XZfw3FIUGefyhFiinNPAjrr0XP8LPW1Ft4nCafVMSu1eAxeJjBr+4i ShUsVvgGGbY6qY7dygNmCaM8oDWsEsiaPE0Go7HgWWG6jBa44KCCMc3i/kL0bEjF9cWReC ChOwmGVLVJ7kd2+ioUct3vQFn5rYYPEXecjFxZ58uLX4X/qxtj1qkj49Ef7YlA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1686914727; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=G22dwzIlCJuuAAqHAywFRu3WniA79YSRhjQkgApGuTg=; b=BwrX1l/8cVZVJhsMn/Hp/zH82K7mweTjogyKjBzIp+0/YTR1BPiZ9nb0GdjyTqqgFULaRo oXp7MsEKoc/St0Dw== From: "irqchip-bot for Marc Zyngier" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-kernel@vger.kernel.org Subject: [irqchip: irq/irqchip-next] genirq: Use BIT() for the IRQD_* state flags Cc: Marc Zyngier , tglx@linutronix.de MIME-Version: 1.0 Message-ID: <168691472694.404.16292215695049776270.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the irq/irqchip-next branch of ir= qchip: Commit-ID: 0cfb4a1af386427cdaba98f18f501eb074985cfd Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-plat= forms/0cfb4a1af386427cdaba98f18f501eb074985cfd Author: Marc Zyngier AuthorDate: Thu, 15 Jun 2023 14:58:52 +01:00 Committer: Marc Zyngier CommitterDate: Fri, 16 Jun 2023 12:22:00 +01:00 genirq: Use BIT() for the IRQD_* state flags As we're about to use the last bit available in the IRQD_* state flags, rewrite these flags with BIT(), which ensures that these constant do not represent a signed value. Signed-off-by: Marc Zyngier --- include/linux/irq.h | 46 ++++++++++++++++++++++---------------------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/include/linux/irq.h b/include/linux/irq.h index b1b28af..d9c86db 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -226,29 +226,29 @@ struct irq_data { */ enum { IRQD_TRIGGER_MASK =3D 0xf, - IRQD_SETAFFINITY_PENDING =3D (1 << 8), - IRQD_ACTIVATED =3D (1 << 9), - IRQD_NO_BALANCING =3D (1 << 10), - IRQD_PER_CPU =3D (1 << 11), - IRQD_AFFINITY_SET =3D (1 << 12), - IRQD_LEVEL =3D (1 << 13), - IRQD_WAKEUP_STATE =3D (1 << 14), - IRQD_MOVE_PCNTXT =3D (1 << 15), - IRQD_IRQ_DISABLED =3D (1 << 16), - IRQD_IRQ_MASKED =3D (1 << 17), - IRQD_IRQ_INPROGRESS =3D (1 << 18), - IRQD_WAKEUP_ARMED =3D (1 << 19), - IRQD_FORWARDED_TO_VCPU =3D (1 << 20), - IRQD_AFFINITY_MANAGED =3D (1 << 21), - IRQD_IRQ_STARTED =3D (1 << 22), - IRQD_MANAGED_SHUTDOWN =3D (1 << 23), - IRQD_SINGLE_TARGET =3D (1 << 24), - IRQD_DEFAULT_TRIGGER_SET =3D (1 << 25), - IRQD_CAN_RESERVE =3D (1 << 26), - IRQD_MSI_NOMASK_QUIRK =3D (1 << 27), - IRQD_HANDLE_ENFORCE_IRQCTX =3D (1 << 28), - IRQD_AFFINITY_ON_ACTIVATE =3D (1 << 29), - IRQD_IRQ_ENABLED_ON_SUSPEND =3D (1 << 30), + IRQD_SETAFFINITY_PENDING =3D BIT(8), + IRQD_ACTIVATED =3D BIT(9), + IRQD_NO_BALANCING =3D BIT(10), + IRQD_PER_CPU =3D BIT(11), + IRQD_AFFINITY_SET =3D BIT(12), + IRQD_LEVEL =3D BIT(13), + IRQD_WAKEUP_STATE =3D BIT(14), + IRQD_MOVE_PCNTXT =3D BIT(15), + IRQD_IRQ_DISABLED =3D BIT(16), + IRQD_IRQ_MASKED =3D BIT(17), + IRQD_IRQ_INPROGRESS =3D BIT(18), + IRQD_WAKEUP_ARMED =3D BIT(19), + IRQD_FORWARDED_TO_VCPU =3D BIT(20), + IRQD_AFFINITY_MANAGED =3D BIT(21), + IRQD_IRQ_STARTED =3D BIT(22), + IRQD_MANAGED_SHUTDOWN =3D BIT(23), + IRQD_SINGLE_TARGET =3D BIT(24), + IRQD_DEFAULT_TRIGGER_SET =3D BIT(25), + IRQD_CAN_RESERVE =3D BIT(26), + IRQD_MSI_NOMASK_QUIRK =3D BIT(27), + IRQD_HANDLE_ENFORCE_IRQCTX =3D BIT(28), + IRQD_AFFINITY_ON_ACTIVATE =3D BIT(29), + IRQD_IRQ_ENABLED_ON_SUSPEND =3D BIT(30), }; =20 #define __irqd_to_state(d) ACCESS_PRIVATE((d)->common, state_use_accessors)