From nobody Sun Feb 8 12:31:44 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FD1DC77B73 for ; Tue, 6 Jun 2023 08:27:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237056AbjFFI1x (ORCPT ); Tue, 6 Jun 2023 04:27:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53706 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236790AbjFFI0h (ORCPT ); Tue, 6 Jun 2023 04:26:37 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BBC09E6D; Tue, 6 Jun 2023 01:26:27 -0700 (PDT) Date: Tue, 06 Jun 2023 08:26:23 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1686039983; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7BVDO/8gJZj7K/uWhJR+SLhcvYFdcQ3bv6aKP5perg4=; b=GYXxdGrvZCe2Apc8mBoU0ZNameLDNfiiQFEahmGUpOcE7Y9f/hDVih/qy2ZOxTydyFbdim urrhk9kEQmCbzweKezNkQ/nUa8z3rczej/8p/LkRSzghEdSwGrwjiEy2saIU6S+s49S+Gm kcznVtmHGlfi1o4AtUJyKp/qCcbedPL+pvlkFI4LPcUU2lkwPHSHXxIRCK80ik8490+nAs X2siq3lLP3f0n2gogybaOH3QoNyUjg4W+0Y1rkJ6MhsDcLcy6EFy5viPo51fwqRsdv9xYT WArDPIMIf+JL+U4A2LFBYjX8zBM0yvD72M2miuI54BjR8Wr7ZTx/MBIQi4+EZQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1686039983; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7BVDO/8gJZj7K/uWhJR+SLhcvYFdcQ3bv6aKP5perg4=; b=jyB738t1mJQn2Nq0aVml43g9WV8G8rgsrCJMkS8Z3bAjlOSSMM2Yh3QWiYiQ3rXxmR/3uu J7byqqz3qjCpAaBA== From: "tip-bot2 for Mark Rutland" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: locking/core] locking/atomic: m68k: add preprocessor symbols Cc: Mark Rutland , "Peter Zijlstra (Intel)" , Kees Cook , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20230605070124.3741859-9-mark.rutland@arm.com> References: <20230605070124.3741859-9-mark.rutland@arm.com> MIME-Version: 1.0 Message-ID: <168603998326.404.3160669405700369227.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the locking/core branch of tip: Commit-ID: e50f06ce2d876c740993b5e3d01e203520391ccd Gitweb: https://git.kernel.org/tip/e50f06ce2d876c740993b5e3d01e20352= 0391ccd Author: Mark Rutland AuthorDate: Mon, 05 Jun 2023 08:01:05 +01:00 Committer: Peter Zijlstra CommitterDate: Mon, 05 Jun 2023 09:57:16 +02:00 locking/atomic: m68k: add preprocessor symbols Some atomics can be implemented in several different ways, e.g. FULL/ACQUIRE/RELEASE ordered atomics can be implemented in terms of RELAXED atomics, and ACQUIRE/RELEASE/RELAXED can be implemented in terms of FULL ordered atomics. Other atomics are optional, and don't exist in some configurations (e.g. not all architectures implement the 128-bit cmpxchg ops). Subsequent patches will require that architectures define a preprocessor symbol for any atomic (or ordering variant) which is optional. This will make the fallback ifdeffery more robust, and simplify future changes. Add the required definitions to arch/m68k. Signed-off-by: Mark Rutland Signed-off-by: Peter Zijlstra (Intel) Reviewed-by: Kees Cook Link: https://lore.kernel.org/r/20230605070124.3741859-9-mark.rutland@arm.c= om --- arch/m68k/include/asm/atomic.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/m68k/include/asm/atomic.h b/arch/m68k/include/asm/atomic.h index 190a032..4bfbc25 100644 --- a/arch/m68k/include/asm/atomic.h +++ b/arch/m68k/include/asm/atomic.h @@ -106,6 +106,11 @@ static inline int arch_atomic_fetch_##op(int i, atomic= _t * v) \ ATOMIC_OPS(add, +=3D, add) ATOMIC_OPS(sub, -=3D, sub) =20 +#define arch_atomic_add_return arch_atomic_add_return +#define arch_atomic_sub_return arch_atomic_sub_return +#define arch_atomic_fetch_add arch_atomic_fetch_add +#define arch_atomic_fetch_sub arch_atomic_fetch_sub + #undef ATOMIC_OPS #define ATOMIC_OPS(op, c_op, asm_op) \ ATOMIC_OP(op, c_op, asm_op) \ @@ -115,6 +120,10 @@ ATOMIC_OPS(and, &=3D, and) ATOMIC_OPS(or, |=3D, or) ATOMIC_OPS(xor, ^=3D, eor) =20 +#define arch_atomic_fetch_and arch_atomic_fetch_and +#define arch_atomic_fetch_or arch_atomic_fetch_or +#define arch_atomic_fetch_xor arch_atomic_fetch_xor + #undef ATOMIC_OPS #undef ATOMIC_FETCH_OP #undef ATOMIC_OP_RETURN