From nobody Sun Feb 8 10:21:59 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 715D1C77B73 for ; Mon, 5 Jun 2023 19:17:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235646AbjFETQ7 (ORCPT ); Mon, 5 Jun 2023 15:16:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40392 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232590AbjFETQX (ORCPT ); Mon, 5 Jun 2023 15:16:23 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 776CB12A; Mon, 5 Jun 2023 12:16:21 -0700 (PDT) Date: Mon, 05 Jun 2023 19:16:18 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1685992579; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qV12sIK+dTEZk9yvJGtxGftiso3dDXEttu5OK2fo7LI=; b=KVarS9/FSyPeDPQWiWW0gHdLiyRLje9AymyVAHQxvj6DWGG6JaS7HRqUoi35sxvCnD8mIa MCroJABppjDzj36IVPDaRvF/1HqLMwLjNxHqopi+PGJSGcV9iPsZTGVzyGhbGNi/uWpoCI Dvi389UT3JpoN1xIYjP0hNUpnzVf5iBUyBCdDrFKlK4mJPhOmgcZ23abqOB3A3+XoYe9/R WiqcJGQ1whN//mldJzYiX6qh16BFQPkWrpxtkIOJkRHDJfV1wcCIa50chBd8RsD35tNYX6 xLqr3KBEaNohmO8QtBg1Oamf/WVUzaasadkgqTDKgJQeLgaY8MUI/AElqSEXoA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1685992579; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qV12sIK+dTEZk9yvJGtxGftiso3dDXEttu5OK2fo7LI=; b=EyLpy3JzlVWOJmp8V9x9qN2YmW9JsKFVze9gUW6t1pPuYLA23Y6fqLZkAVsefKP+DdY7kQ fbPAmeDuVH2lZkBg== From: "tip-bot2 for Peter Zijlstra" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: sched/core] arm64/arch_timer: Provide noinstr sched_clock_read() functions Cc: "Peter Zijlstra (Intel)" , Michael Kelley , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20230519102715.435618812@infradead.org> References: <20230519102715.435618812@infradead.org> MIME-Version: 1.0 Message-ID: <168599257881.404.5741830687039428221.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the sched/core branch of tip: Commit-ID: 24ee7607b286b44a5112ced38652df14cd80d5e2 Gitweb: https://git.kernel.org/tip/24ee7607b286b44a5112ced38652df14c= d80d5e2 Author: Peter Zijlstra AuthorDate: Fri, 19 May 2023 12:21:02 +02:00 Committer: Peter Zijlstra CommitterDate: Mon, 05 Jun 2023 21:11:05 +02:00 arm64/arch_timer: Provide noinstr sched_clock_read() functions With the intent to provide local_clock_noinstr(), a variant of local_clock() that's safe to be called from noinstr code (with the assumption that any such code will already be non-preemptible), prepare for things by providing a noinstr sched_clock_read() function. Specifically, preempt_enable_*() calls out to schedule(), which upsets noinstr validation efforts. Signed-off-by: Peter Zijlstra (Intel) Tested-by: Michael Kelley # Hyper-V Link: https://lore.kernel.org/r/20230519102715.435618812@infradead.org Acked-by: Mark Rutland Reported-by: Mark Rutland --- arch/arm64/include/asm/arch_timer.h | 8 +---- drivers/clocksource/arm_arch_timer.c | 54 ++++++++++++++++++++------- 2 files changed, 41 insertions(+), 21 deletions(-) diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/a= rch_timer.h index af1fafb..934c658 100644 --- a/arch/arm64/include/asm/arch_timer.h +++ b/arch/arm64/include/asm/arch_timer.h @@ -88,13 +88,7 @@ static inline notrace u64 arch_timer_read_cntvct_el0(voi= d) =20 #define arch_timer_reg_read_stable(reg) \ ({ \ - u64 _val; \ - \ - preempt_disable_notrace(); \ - _val =3D erratum_handler(read_ ## reg)(); \ - preempt_enable_notrace(); \ - \ - _val; \ + erratum_handler(read_ ## reg)(); \ }) =20 /* diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm= _arch_timer.c index e09d442..b23d23b 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -191,22 +191,40 @@ u32 arch_timer_reg_read(int access, enum arch_timer_r= eg reg, return val; } =20 -static notrace u64 arch_counter_get_cntpct_stable(void) +static noinstr u64 raw_counter_get_cntpct_stable(void) { return __arch_counter_get_cntpct_stable(); } =20 -static notrace u64 arch_counter_get_cntpct(void) +static notrace u64 arch_counter_get_cntpct_stable(void) +{ + u64 val; + preempt_disable_notrace(); + val =3D __arch_counter_get_cntpct_stable(); + preempt_enable_notrace(); + return val; +} + +static noinstr u64 arch_counter_get_cntpct(void) { return __arch_counter_get_cntpct(); } =20 -static notrace u64 arch_counter_get_cntvct_stable(void) +static noinstr u64 raw_counter_get_cntvct_stable(void) { return __arch_counter_get_cntvct_stable(); } =20 -static notrace u64 arch_counter_get_cntvct(void) +static notrace u64 arch_counter_get_cntvct_stable(void) +{ + u64 val; + preempt_disable_notrace(); + val =3D __arch_counter_get_cntvct_stable(); + preempt_enable_notrace(); + return val; +} + +static noinstr u64 arch_counter_get_cntvct(void) { return __arch_counter_get_cntvct(); } @@ -753,14 +771,14 @@ static int arch_timer_set_next_event_phys(unsigned lo= ng evt, return 0; } =20 -static u64 arch_counter_get_cnt_mem(struct arch_timer *t, int offset_lo) +static noinstr u64 arch_counter_get_cnt_mem(struct arch_timer *t, int offs= et_lo) { u32 cnt_lo, cnt_hi, tmp_hi; =20 do { - cnt_hi =3D readl_relaxed(t->base + offset_lo + 4); - cnt_lo =3D readl_relaxed(t->base + offset_lo); - tmp_hi =3D readl_relaxed(t->base + offset_lo + 4); + cnt_hi =3D __raw_readl(t->base + offset_lo + 4); + cnt_lo =3D __raw_readl(t->base + offset_lo); + tmp_hi =3D __raw_readl(t->base + offset_lo + 4); } while (cnt_hi !=3D tmp_hi); =20 return ((u64) cnt_hi << 32) | cnt_lo; @@ -1060,7 +1078,7 @@ bool arch_timer_evtstrm_available(void) return cpumask_test_cpu(raw_smp_processor_id(), &evtstrm_available); } =20 -static u64 arch_counter_get_cntvct_mem(void) +static noinstr u64 arch_counter_get_cntvct_mem(void) { return arch_counter_get_cnt_mem(arch_timer_mem, CNTVCT_LO); } @@ -1074,6 +1092,7 @@ struct arch_timer_kvm_info *arch_timer_get_kvm_info(v= oid) =20 static void __init arch_counter_register(unsigned type) { + u64 (*scr)(void); u64 start_count; int width; =20 @@ -1083,21 +1102,28 @@ static void __init arch_counter_register(unsigned t= ype) =20 if ((IS_ENABLED(CONFIG_ARM64) && !is_hyp_mode_available()) || arch_timer_uses_ppi =3D=3D ARCH_TIMER_VIRT_PPI) { - if (arch_timer_counter_has_wa()) + if (arch_timer_counter_has_wa()) { rd =3D arch_counter_get_cntvct_stable; - else + scr =3D raw_counter_get_cntvct_stable; + } else { rd =3D arch_counter_get_cntvct; + scr =3D arch_counter_get_cntvct; + } } else { - if (arch_timer_counter_has_wa()) + if (arch_timer_counter_has_wa()) { rd =3D arch_counter_get_cntpct_stable; - else + scr =3D raw_counter_get_cntpct_stable; + } else { rd =3D arch_counter_get_cntpct; + scr =3D arch_counter_get_cntpct; + } } =20 arch_timer_read_counter =3D rd; clocksource_counter.vdso_clock_mode =3D vdso_default; } else { arch_timer_read_counter =3D arch_counter_get_cntvct_mem; + scr =3D arch_counter_get_cntvct_mem; } =20 width =3D arch_counter_get_width(); @@ -1113,7 +1139,7 @@ static void __init arch_counter_register(unsigned typ= e) timecounter_init(&arch_timer_kvm_info.timecounter, &cyclecounter, start_count); =20 - sched_clock_register(arch_timer_read_counter, width, arch_timer_rate); + sched_clock_register(scr, width, arch_timer_rate); } =20 static void arch_timer_stop(struct clock_event_device *clk)