From nobody Thu Dec 18 08:53:34 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58307C7EE22 for ; Wed, 10 May 2023 13:26:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237054AbjEJN0C (ORCPT ); Wed, 10 May 2023 09:26:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60572 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236568AbjEJNZ5 (ORCPT ); Wed, 10 May 2023 09:25:57 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 779C65BAC; Wed, 10 May 2023 06:25:55 -0700 (PDT) Date: Wed, 10 May 2023 13:25:52 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1683725153; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=h1ya3nX+Ys2msmlSi+coH03InJp1/N7yftwS6LeddTI=; b=py/sAHplJfeVTfLjX9TXYO19hcL9n6EyafFGXUvmRBETral5GHvtiu/E2gTmkbxe1xFKL8 9A5r2pqKEp0+QdpBDWpEIKPLfJqQNlaq1kqqJGbSZlw9iPft0C/Pk6rXR2Asd5lFQeJ1CT OmBiOFsX+yekua0YcwJUYkMdpdy39gOBeqDYIojbo0B+l2Y1T7YCdUJo9SvSeIiCj29Neh rZwe5mMcaY+fo465H6DdqKsBdhD9dzfZ7+tVXZQhBWLoPa7HbKdbGHPLoZ4gkHkgW9lDPf ctGRxbZnLALJYsBZXx8obCvbUjfox0+2VgFBaRhyFQtte5OpttXSwLmMk4aZug== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1683725153; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=h1ya3nX+Ys2msmlSi+coH03InJp1/N7yftwS6LeddTI=; b=3DANIp1beaGSrudp+8Ir0VTCfRhm7AOcspqne0on4AMPwRCAbwRjEXWyXSGkOdTKmjnHWY MCac9ArqjuBI5YDg== From: "tip-bot2 for Namhyung Kim" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: perf/urgent] perf/x86: Fix missing sample size update on AMD BRS Cc: Namhyung Kim , "Peter Zijlstra (Intel)" , stable@vger.kernel.org, x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20230427030527.580841-1-namhyung@kernel.org> References: <20230427030527.580841-1-namhyung@kernel.org> MIME-Version: 1.0 Message-ID: <168372515291.404.10094366236022202082.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the perf/urgent branch of tip: Commit-ID: 90befef5a9e820ccccc33181ec14c015980300cc Gitweb: https://git.kernel.org/tip/90befef5a9e820ccccc33181ec14c0159= 80300cc Author: Namhyung Kim AuthorDate: Wed, 26 Apr 2023 20:05:27 -07:00 Committer: Peter Zijlstra CommitterDate: Mon, 08 May 2023 10:58:26 +02:00 perf/x86: Fix missing sample size update on AMD BRS It missed to convert a PERF_SAMPLE_BRANCH_STACK user to call the new perf_sample_save_brstack() helper in order to update the dyn_size. This affects AMD Zen3 machines with the branch-brs event. Fixes: eb55b455ef9c ("perf/core: Add perf_sample_save_brstack() helper") Signed-off-by: Namhyung Kim Signed-off-by: Peter Zijlstra (Intel) Cc: stable@vger.kernel.org Link: https://lkml.kernel.org/r/20230427030527.580841-1-namhyung@kernel.org --- arch/x86/events/core.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c index d096b04..9d24870 100644 --- a/arch/x86/events/core.c +++ b/arch/x86/events/core.c @@ -1703,10 +1703,8 @@ int x86_pmu_handle_irq(struct pt_regs *regs) =20 perf_sample_data_init(&data, 0, event->hw.last_period); =20 - if (has_branch_stack(event)) { - data.br_stack =3D &cpuc->lbr_stack; - data.sample_flags |=3D PERF_SAMPLE_BRANCH_STACK; - } + if (has_branch_stack(event)) + perf_sample_save_brstack(&data, event, &cpuc->lbr_stack); =20 if (perf_event_overflow(event, &data, regs)) x86_pmu_stop(event, 0);