From nobody Wed Dec 17 15:43:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B090EC77B73 for ; Wed, 19 Apr 2023 09:57:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232869AbjDSJ5t (ORCPT ); Wed, 19 Apr 2023 05:57:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51758 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232706AbjDSJ5Y (ORCPT ); Wed, 19 Apr 2023 05:57:24 -0400 Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 03EBC7EC0 for ; Wed, 19 Apr 2023 02:57:22 -0700 (PDT) Received: from loongson.cn (unknown [113.200.148.30]) by gateway (Coremail) with SMTP id _____8DxJYwBuz9k9+EeAA--.47922S3; Wed, 19 Apr 2023 17:57:21 +0800 (CST) Received: from linux.localdomain (unknown [113.200.148.30]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Bxbb78uj9kXuguAA--.15680S7; Wed, 19 Apr 2023 17:57:19 +0800 (CST) From: Tiezhu Yang To: Huacai Chen , WANG Xuerui Cc: loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, loongson-kernel@lists.loongnix.cn Subject: [PATCH v3 5/6] LoongArch: Check atomic instructions in insns_not_supported() Date: Wed, 19 Apr 2023 17:57:00 +0800 Message-Id: <1681898221-27828-6-git-send-email-yangtiezhu@loongson.cn> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1681898221-27828-1-git-send-email-yangtiezhu@loongson.cn> References: <1681898221-27828-1-git-send-email-yangtiezhu@loongson.cn> X-CM-TRANSID: AQAAf8Bxbb78uj9kXuguAA--.15680S7 X-CM-SenderInfo: p1dqw3xlh2x3gn0dqz5rrqw2lrqou0/ X-Coremail-Antispam: 1Uk129KBjvJXoWxWw45Zw4xZF1rXF4fZr4xWFg_yoWrZF4rpF ZrZrn5Gr48W3WfWr9rtas3Zr4Utw4v939IqF13X34xC3y7Xr15Jr1xKryUXF1Dt395Kr40 qrW7JrZIva13JaDanT9S1TB71UUUUUJqnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj qI5I8CrVACY4xI64kE6c02F40Ex7xfYxn0WfASr-VFAUDa7-sFnT9fnUUIcSsGvfJTRUUU b3kYFVCjjxCrM7AC8VAFwI0_Jr0_Gr1l1xkIjI8I6I8E6xAIw20EY4v20xvaj40_Wr0E3s 1l1IIY67AEw4v_Jrv_JF1l8cAvFVAK0II2c7xJM28CjxkF64kEwVA0rcxSw2x7M28EF7xv wVC0I7IYx2IY67AKxVW5JVW7JwA2z4x0Y4vE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwA2z4 x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84ACjcxK6I8E87Iv6xkF7I0E14v26F4UJVW0owAa w2AFwI0_Jrv_JF1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44 I27wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jw0_WrylYx0Ex4A2 jsIE14v26r4j6F4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20x vY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwCFI7km07C267AKxVWUXVWUAwC20s02 6c02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF 0_Jw1lIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVW5JVW7JwCI42IY6xIIjxv20xvE c7CjxVAFwI0_Gr0_Cr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14 v26r4j6F4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x 07jz2NtUUUUU= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Like llsc instructions, the atomic memory access instructions should not be supported for probing, check them in insns_not_supported(). Here is a simple example with CONFIG_UPROBE_EVENTS=3Dy: # cat pthread.c #include #include #include static pthread_spinlock_t lock; static pthread_t t1, t2; static int count =3D 0; void *t1_start(void *arg) { for (int i =3D 0; i < 10000; i++) { pthread_spin_lock(&lock); count++; pthread_spin_unlock(&lock); } } void *t2_start(void *arg) { for (int i =3D 0; i < 20000; i++) { pthread_spin_lock(&lock); count++; pthread_spin_unlock(&lock); } } int main() { int ret; ret =3D pthread_spin_init(&lock, PTHREAD_PROCESS_PRIVATE); if (ret) return -1; ret =3D pthread_create(&t1, NULL, t1_start, NULL); if (ret) exit(1); ret =3D pthread_create(&t2, NULL, t2_start, NULL); if (ret) exit(1); pthread_join(t1, NULL); pthread_join(t2, NULL); pthread_spin_destroy(&lock); printf("%d\n", count); return 0; } # gcc pthread.c -o /tmp/pthread # objdump -d /lib64/libc.so.6 | grep -w "pthread_spin_lock" -A 5 | head -5 00000000000886a4 : 886a4: 0280040d addi.w $t1, $zero, 1(0x1) 886a8: 3869348c amswap_db.w $t0, $t1, $a0 886ac: 0040818c slli.w $t0, $t0, 0x0 886b0: 44003180 bnez $t0, 48(0x30) # 886e0 # cd /sys/kernel/debug/tracing # echo > uprobe_events # echo "p:myuprobe /lib64/libc.so.6:0x886a4" > uprobe_events Without this patch: # echo 1 > events/uprobes/enable # echo 1 > tracing_on # /tmp/pthread Trace/breakpoint trap (core dumped) With this patch: # echo 1 > events/uprobes/enable bash: echo: write error: Invalid argument Reported-by: Hengqi Chen Link: https://lore.kernel.org/all/SY4P282MB351877A70A0333C790FE85A5C09C9@SY= 4P282MB3518.AUSP282.PROD.OUTLOOK.COM/ Signed-off-by: Tiezhu Yang --- arch/loongarch/include/asm/inst.h | 26 ++++++++++++++++++++++++++ arch/loongarch/kernel/inst.c | 6 ++++++ arch/loongarch/kernel/uprobes.c | 9 +++++---- 3 files changed, 37 insertions(+), 4 deletions(-) diff --git a/arch/loongarch/include/asm/inst.h b/arch/loongarch/include/asm= /inst.h index 061c0ea..09d5656 100644 --- a/arch/loongarch/include/asm/inst.h +++ b/arch/loongarch/include/asm/inst.h @@ -176,6 +176,32 @@ enum reg3_op { amord_op =3D 0x70c7, amxorw_op =3D 0x70c8, amxord_op =3D 0x70c9, + ammaxw_op =3D 0x70ca, + ammaxd_op =3D 0x70cb, + amminw_op =3D 0x70cc, + ammind_op =3D 0x70cd, + ammaxwu_op =3D 0x70ce, + ammaxdu_op =3D 0x70cf, + amminwu_op =3D 0x70d0, + ammindu_op =3D 0x70d1, + amswapdbw_op =3D 0x70d2, + amswapdbd_op =3D 0x70d3, + amadddbw_op =3D 0x70d4, + amadddbd_op =3D 0x70d5, + amanddbw_op =3D 0x70d6, + amanddbd_op =3D 0x70d7, + amordbw_op =3D 0x70d8, + amordbd_op =3D 0x70d9, + amxordbw_op =3D 0x70da, + amxordbd_op =3D 0x70db, + ammaxdbw_op =3D 0x70dc, + ammaxdbd_op =3D 0x70dd, + ammindbw_op =3D 0x70de, + ammindbd_op =3D 0x70df, + ammaxdbwu_op =3D 0x70e0, + ammaxdbdu_op =3D 0x70e1, + ammindbwu_op =3D 0x70e2, + ammindbdu_op =3D 0x70e3, }; =20 enum reg3sa2_op { diff --git a/arch/loongarch/kernel/inst.c b/arch/loongarch/kernel/inst.c index 1d7d579..ce25a63 100644 --- a/arch/loongarch/kernel/inst.c +++ b/arch/loongarch/kernel/inst.c @@ -135,6 +135,12 @@ void simu_branch(struct pt_regs *regs, union loongarch= _instruction insn) =20 bool insns_not_supported(union loongarch_instruction insn) { + switch (insn.reg3_format.opcode) { + case amswapw_op ... ammindbdu_op: + pr_notice("atomic memory access instructions are not supported\n"); + return true; + } + switch (insn.reg2i14_format.opcode) { case llw_op: case lld_op: diff --git a/arch/loongarch/kernel/uprobes.c b/arch/loongarch/kernel/uprobe= s.c index 628c39d..bc6ec74 100644 --- a/arch/loongarch/kernel/uprobes.c +++ b/arch/loongarch/kernel/uprobes.c @@ -15,10 +15,11 @@ int arch_uprobe_analyze_insn(struct arch_uprobe *auprob= e, if (addr & 0x3) return -EILSEQ; =20 - insn.word =3D auprobe->insn[0]; - - if (insns_not_supported(insn)) - return -EINVAL; + for (int idx =3D ARRAY_SIZE(auprobe->insn) - 1; idx >=3D 0; idx--) { + insn.word =3D auprobe->insn[idx]; + if (insns_not_supported(insn)) + return -EINVAL; + } =20 if (insns_need_simulation(insn)) { auprobe->ixol[0] =3D larch_insn_gen_nop(); --=20 2.1.0