From nobody Wed Dec 17 15:43:13 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5CD0AC6FD18 for ; Wed, 19 Apr 2023 09:57:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232854AbjDSJ5c (ORCPT ); Wed, 19 Apr 2023 05:57:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51754 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232553AbjDSJ5X (ORCPT ); Wed, 19 Apr 2023 05:57:23 -0400 Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 2F3B5B74D for ; Wed, 19 Apr 2023 02:57:19 -0700 (PDT) Received: from loongson.cn (unknown [113.200.148.30]) by gateway (Coremail) with SMTP id _____8CxC9r+uj9k5uEeAA--.54402S3; Wed, 19 Apr 2023 17:57:18 +0800 (CST) Received: from linux.localdomain (unknown [113.200.148.30]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Bxbb78uj9kXuguAA--.15680S4; Wed, 19 Apr 2023 17:57:17 +0800 (CST) From: Tiezhu Yang To: Huacai Chen , WANG Xuerui Cc: loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, loongson-kernel@lists.loongnix.cn Subject: [PATCH v3 2/6] LoongArch: Add larch_insn_gen_break() to generate break insns Date: Wed, 19 Apr 2023 17:56:57 +0800 Message-Id: <1681898221-27828-3-git-send-email-yangtiezhu@loongson.cn> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1681898221-27828-1-git-send-email-yangtiezhu@loongson.cn> References: <1681898221-27828-1-git-send-email-yangtiezhu@loongson.cn> X-CM-TRANSID: AQAAf8Bxbb78uj9kXuguAA--.15680S4 X-CM-SenderInfo: p1dqw3xlh2x3gn0dqz5rrqw2lrqou0/ X-Coremail-Antispam: 1Uk129KBjvJXoW7KFWfXF4furWUWF1kJw47Arb_yoW8uw1kpF 9Fvwn5KrW5WryfGr9Iq3y5ur13Jan7WwsFqFsIya4xGr4UXa45XFy0gryqqFyjva1kWFW0 q3WSqr1Iv3W5JaDanT9S1TB71UUUUUJqnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj qI5I8CrVACY4xI64kE6c02F40Ex7xfYxn0WfASr-VFAUDa7-sFnT9fnUUIcSsGvfJTRUUU b3kYFVCjjxCrM7AC8VAFwI0_Jr0_Gr1l1xkIjI8I6I8E6xAIw20EY4v20xvaj40_Wr0E3s 1l1IIY67AEw4v_JF0_JFyl8cAvFVAK0II2c7xJM28CjxkF64kEwVA0rcxSw2x7M28EF7xv wVC0I7IYx2IY67AKxVW5JVW7JwA2z4x0Y4vE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwA2z4 x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84ACjcxK6I8E87Iv6xkF7I0E14v26F4UJVW0owAa w2AFwI0_Jrv_JF1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44 I27wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jw0_WrylYx0Ex4A2 jsIE14v26r4j6F4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20x vY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwCFI7km07C267AKxVWUXVWUAwC20s02 6c02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF 0_Jw1lIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVW8JVW5JwCI42IY6xIIjxv20xvE c7CjxVAFwI0_Gr0_Cr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14 v26r4j6F4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x 07jrPEfUUUUU= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" There exist various break insns such as BRK_KPROBE_BP, BRK_KPROBE_SSTEPBP, BRK_UPROBE_BP and BRK_UPROBE_XOLBP, add larch_insn_gen_break() to generate break insns simpler, this is preparation for later patch. Signed-off-by: Tiezhu Yang --- arch/loongarch/include/asm/inst.h | 12 ++++++++++++ arch/loongarch/kernel/inst.c | 9 +++++++++ 2 files changed, 21 insertions(+) diff --git a/arch/loongarch/include/asm/inst.h b/arch/loongarch/include/asm= /inst.h index 9ea485b..061c0ea 100644 --- a/arch/loongarch/include/asm/inst.h +++ b/arch/loongarch/include/asm/inst.h @@ -421,6 +421,8 @@ u32 larch_insn_gen_nop(void); u32 larch_insn_gen_b(unsigned long pc, unsigned long dest); u32 larch_insn_gen_bl(unsigned long pc, unsigned long dest); =20 +u32 larch_insn_gen_break(int imm); + u32 larch_insn_gen_or(enum loongarch_gpr rd, enum loongarch_gpr rj, enum l= oongarch_gpr rk); u32 larch_insn_gen_move(enum loongarch_gpr rd, enum loongarch_gpr rj); =20 @@ -439,6 +441,16 @@ static inline bool unsigned_imm_check(unsigned long va= l, unsigned int bit) return val < (1UL << bit); } =20 +#define DEF_EMIT_REG0I15_FORMAT(NAME, OP) \ +static inline void emit_##NAME(union loongarch_instruction *insn, \ + int imm) \ +{ \ + insn->reg0i15_format.opcode =3D OP; \ + insn->reg0i15_format.immediate =3D imm; \ +} + +DEF_EMIT_REG0I15_FORMAT(break, break_op) + #define DEF_EMIT_REG0I26_FORMAT(NAME, OP) \ static inline void emit_##NAME(union loongarch_instruction *insn, \ int offset) \ diff --git a/arch/loongarch/kernel/inst.c b/arch/loongarch/kernel/inst.c index 6f61956..1d7d579 100644 --- a/arch/loongarch/kernel/inst.c +++ b/arch/loongarch/kernel/inst.c @@ -247,6 +247,15 @@ u32 larch_insn_gen_bl(unsigned long pc, unsigned long = dest) return insn.word; } =20 +u32 larch_insn_gen_break(int imm) +{ + union loongarch_instruction insn; + + emit_break(&insn, imm); + + return insn.word; +} + u32 larch_insn_gen_or(enum loongarch_gpr rd, enum loongarch_gpr rj, enum l= oongarch_gpr rk) { union loongarch_instruction insn; --=20 2.1.0