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[46.138.144.249]) by smtp.gmail.com with ESMTPSA id c24-20020a2e6818000000b00290716d65dcsm644822lja.136.2023.03.12.06.10.49 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 06:10:50 -0700 (PDT) Message-Id: <1678626510.1783316-1-sleirsgoevy@gmail.com> In-Reply-To: <1678626510.1783316-0-sleirsgoevy@gmail.com> From: Sergey Lisov Date: Sun, 12 Mar 2023 16:03:15 +0300 Subject: [PATCH v3 1/2] dt-bindings: exynos-dw-mshc-common: add exynos78xx variants To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Jaehoon Chung Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Some Samsung Exynos boards using the arm64 architecture have DW MMC controllers configured for a 32-bit data bus but a 64-bit FIFO. On these systems the 64-bit FIFO registers must be accessed in two 32-bit halves. Add two new compatible strings, "samsung,exynos78xx-dw-mshc" and "samsung,exynos78xx-dw-mshc-smu" respectively, to denote exynos78xx boards that need this quirk. But it's very possible that all "samsung,exynos7-dw-mshc" boards are actually affected. --- .../devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml | 2 ++ arch/arm64/boot/dts/exynos/exynos7885.dtsi | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.y= aml b/Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml index fdaa18481..a72a67792 100644 --- a/Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml +++ b/Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml @@ -22,6 +22,8 @@ properties: - samsung,exynos5420-dw-mshc-smu - samsung,exynos7-dw-mshc - samsung,exynos7-dw-mshc-smu + - samsung,exynos78xx-dw-mshc + - samsung,exynos78xx-dw-mshc-smu - axis,artpec8-dw-mshc =20 reg: diff --git a/arch/arm64/boot/dts/exynos/exynos7885.dtsi b/arch/arm64/boot/d= ts/exynos/exynos7885.dtsi index 23c2e0bb0..4b94ac9da 100644 --- a/arch/arm64/boot/dts/exynos/exynos7885.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7885.dtsi @@ -294,7 +294,7 @@ pmu_system_controller: system-controller@11c80000 { }; =20 mmc_0: mmc@13500000 { - compatible =3D "samsung,exynos7-dw-mshc-smu"; + compatible =3D "samsung,exynos78xx-dw-mshc-smu"; reg =3D <0x13500000 0x2000>; interrupts =3D ; #address-cells =3D <1>; --=20 2.38.3