From nobody Mon Sep 15 02:12:33 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 63404C63797 for ; Tue, 17 Jan 2023 07:30:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235679AbjAQHa0 (ORCPT ); Tue, 17 Jan 2023 02:30:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34494 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235698AbjAQH37 (ORCPT ); Tue, 17 Jan 2023 02:29:59 -0500 Received: from out30-131.freemail.mail.aliyun.com (out30-131.freemail.mail.aliyun.com [115.124.30.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5D57F24110; Mon, 16 Jan 2023 23:29:57 -0800 (PST) X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R651e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=ay29a033018045168;MF=renyu.zj@linux.alibaba.com;NM=1;PH=DS;RN=21;SR=0;TI=SMTPD_---0VZm6e3a_1673940592; Received: from srmbuffer011165236051.sqa.eu95(mailfrom:renyu.zj@linux.alibaba.com fp:SMTPD_---0VZm6e3a_1673940592) by smtp.aliyun-inc.com; Tue, 17 Jan 2023 15:29:52 +0800 From: Jing Zhang To: John Garry , Ian Rogers Cc: Xing Zhengjun , Will Deacon , James Clark , Mike Leach , Leo Yan , linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Andrew Kilroy , Shuai Xue , Zhuo Song , Jing Zhang Subject: [PATCH v8 4/9] perf vendor events arm64: Add topdown L1 metrics for neoverse-n2-v2 Date: Tue, 17 Jan 2023 15:29:28 +0800 Message-Id: <1673940573-90503-5-git-send-email-renyu.zj@linux.alibaba.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1673940573-90503-1-git-send-email-renyu.zj@linux.alibaba.com> References: <1673940573-90503-1-git-send-email-renyu.zj@linux.alibaba.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add general topdown L1 metrics for neoverse-n2-v2. Due to the wrong count of stall_slot and stall_slot_frontend on neoverse-n2, the real stall_slot and real stall_slot_frontend need to subtract cpu_cycles, so overwrite the "MetricExpr" for neoverse-n2 which slots are 5. Reference from ARM neoverse-n2 errata notice [0], D117. Since neoverse-n2/neoverse-v2 does not yet support topdown L2, metric groups such as Cache, TLB, Branch, InstructionsMix and PEutilization will be added to further analysis of performance bottlenecks in the following patches. Reference from ARM PMU guide [1][2]. [0] https://documentation-service.arm.com/static/636a66a64e6cf12278ad89cb?t= oken=3D [1] https://documentation-service.arm.com/static/628f8fa3dfaf015c2b76eae8?t= oken=3D [2] https://documentation-service.arm.com/static/62cfe21e31ea212bb6627393?t= oken=3D Signed-off-by: Jing Zhang Reviewed-by: John Garry Acked-by: Ian Rogers --- .../arch/arm64/arm/neoverse-n2-v2/metrics.json | 17 +++++++++++++= ++++ 1 file changed, 17 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/met= rics.json diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.js= on b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json new file mode 100644 index 0000000..4e7417f --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json @@ -0,0 +1,17 @@ +[ + { + "ArchStdEvent": "FRONTEND_BOUND", + "MetricExpr": "((stall_slot_frontend) if (#slots - 5) else (stall_= slot_frontend - cpu_cycles)) / (#slots * cpu_cycles)" + }, + { + "ArchStdEvent": "BAD_SPECULATION", + "MetricExpr": "(1 - op_retired / op_spec) * (1 - (stall_slot if (#= slots - 5) else (stall_slot - cpu_cycles)) / (#slots * cpu_cycles))" + }, + { + "ArchStdEvent": "RETIRING", + "MetricExpr": "(op_retired / op_spec) * (1 - (stall_slot if (#slot= s - 5) else (stall_slot - cpu_cycles)) / (#slots * cpu_cycles))" + }, + { + "ArchStdEvent": "BACKEND_BOUND" + } +] --=20 1.8.3.1