From nobody Sat Sep 21 09:31:45 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B172C54EBE for ; Tue, 10 Jan 2023 05:55:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230080AbjAJFzN (ORCPT ); Tue, 10 Jan 2023 00:55:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57742 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229825AbjAJFzI (ORCPT ); Tue, 10 Jan 2023 00:55:08 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 31139228 for ; Mon, 9 Jan 2023 21:55:07 -0800 (PST) X-UUID: 9c63082d06cb413d83ea5259b7a679fd-20230110 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=nWLgk4eMZAsD/bVVJsuHq4USM6+AlpxQ1BjwEy3BOtI=; b=AjoFMeWjSTcaoplCjp0Nj/sQ/wFeU1vDV8nmxX7Cu7KTN8PDLJxaCQv8MiAjiUOO7T+a4gcpctuHz7LD3RzPrxH0pgEfRcL3twUSHHC7mqYTs/fh+NnciZ9sxcnG7C+zMS8moVa3BkydKnB1JJcQDdC5IwAA/FXyPN9kodytpig=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.17,REQID:d6ec38e1-cd93-425c-820a-b82f0ea33da3,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:90 X-CID-INFO: VERSION:1.1.17,REQID:d6ec38e1-cd93-425c-820a-b82f0ea33da3,IP:0,URL :0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTIO N:quarantine,TS:90 X-CID-META: VersionHash:543e81c,CLOUDID:6a145bf5-ff42-4fb0-b929-626456a83c14,B ulkID:230110135504Y3UIY4NA,BulkQuantity:0,Recheck:0,SF:38|28|17|19|48,TC:n il,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OS I:0,OSA:0 X-CID-BVR: 0,NGT X-UUID: 9c63082d06cb413d83ea5259b7a679fd-20230110 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1791422995; Tue, 10 Jan 2023 13:55:01 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Tue, 10 Jan 2023 13:55:00 +0800 Received: from mszsdaap41.gcn.mediatek.inc (10.16.6.141) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 10 Jan 2023 13:54:59 +0800 From: To: , , , , , , , , CC: , , , , , Xinlei Lee Subject: [PATCH v2 2/3] drm/panel: boe-tv101wum-nl6: Reduce lcm_reset to send initial code time Date: Tue, 10 Jan 2023 13:54:52 +0800 Message-ID: <1673330093-6771-3-git-send-email-xinlei.lee@mediatek.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1673330093-6771-1-git-send-email-xinlei.lee@mediatek.com> References: <1673330093-6771-1-git-send-email-xinlei.lee@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Xinlei Lee Since the panel spec stipulates that the time from lcm_reset to DSI to send the initial code should be greater than 6ms and less than 40ms, so reduce the delay before sending the initial code and avoid panel exceptions. Fixes: a869b9db7adf ("drm/panel: support for boe tv101wum-nl6 wuxga dsi vid= eo mode panel") Signed-off-by: Xinlei Lee --- drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/d= rm/panel/panel-boe-tv101wum-nl6.c index 857a2f0420d7..f0093035f1ff 100644 --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c @@ -780,7 +780,6 @@ static const struct panel_init_cmd inx_hj110iz_init_cmd= [] =3D { }; =20 static const struct panel_init_cmd boe_init_cmd[] =3D { - _INIT_DELAY_CMD(24), _INIT_DCS_CMD(0xB0, 0x05), _INIT_DCS_CMD(0xB1, 0xE5), _INIT_DCS_CMD(0xB3, 0x52), --=20 2.18.0