From nobody Tue Sep 16 04:23:58 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B999C54EBF for ; Fri, 6 Jan 2023 15:06:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235166AbjAFPF7 (ORCPT ); Fri, 6 Jan 2023 10:05:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55604 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234623AbjAFPFr (ORCPT ); Fri, 6 Jan 2023 10:05:47 -0500 Received: from out30-8.freemail.mail.aliyun.com (out30-8.freemail.mail.aliyun.com [115.124.30.8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE2B260844; Fri, 6 Jan 2023 07:05:45 -0800 (PST) X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R161e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=ay29a033018046056;MF=renyu.zj@linux.alibaba.com;NM=1;PH=DS;RN=21;SR=0;TI=SMTPD_---0VZ-UXmi_1673017539; Received: from srmbuffer011165236051.sqa.eu95(mailfrom:renyu.zj@linux.alibaba.com fp:SMTPD_---0VZ-UXmi_1673017539) by smtp.aliyun-inc.com; Fri, 06 Jan 2023 23:05:40 +0800 From: Jing Zhang To: John Garry , Ian Rogers Cc: Xing Zhengjun , Will Deacon , James Clark , Mike Leach , Leo Yan , linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Andrew Kilroy , Shuai Xue , Zhuo Song , Jing Zhang Subject: [PATCH v6 1/7] perf vendor events arm64: Add common topdown L1 metrics Date: Fri, 6 Jan 2023 23:05:23 +0800 Message-Id: <1673017529-1429208-2-git-send-email-renyu.zj@linux.alibaba.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1673017529-1429208-1-git-send-email-renyu.zj@linux.alibaba.com> References: <1673017529-1429208-1-git-send-email-renyu.zj@linux.alibaba.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The metrics of topdown L1 are from ARM sbsa7.0 platform design doc[0], D37-38, which are standard. So put them in the common file sbsa.json of arm64, so that other cores besides n2/v2 can also be reused. Slots may be different in each architecture, so added "#slots" literal to get different constant for each architecture. The value of slots comes from the register PMMIR_EL1, which I can read in /sys/bus/event_source/device/armv8_pmuv3_*/caps/slots. PMMIR_EL1.SLOT might read as zero if the STALL_SLOT event is not implemented or the PMU version is lower than ID_AA64DFR0_EL1_PMUVer_V3P4. [0] https://documentation-service.arm.com/static/60250c7395978b529036da86?t= oken=3D Signed-off-by: Jing Zhang Acked-by: Ian Rogers --- tools/perf/arch/arm64/util/pmu.c | 22 ++++++++++++++++++++++ tools/perf/pmu-events/arch/arm64/sbsa.json | 30 ++++++++++++++++++++++++++= ++++ tools/perf/pmu-events/jevents.py | 2 ++ tools/perf/util/expr.c | 5 +++++ tools/perf/util/pmu.c | 5 +++++ tools/perf/util/pmu.h | 1 + 6 files changed, 65 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/sbsa.json diff --git a/tools/perf/arch/arm64/util/pmu.c b/tools/perf/arch/arm64/util/= pmu.c index 477e513..227dadb 100644 --- a/tools/perf/arch/arm64/util/pmu.c +++ b/tools/perf/arch/arm64/util/pmu.c @@ -3,6 +3,7 @@ #include #include "../../../util/cpumap.h" #include "../../../util/pmu.h" +#include =20 const struct pmu_events_table *pmu_events_table__find(void) { @@ -24,3 +25,24 @@ const struct pmu_events_table *pmu_events_table__find(vo= id) =20 return NULL; } + +int perf_pmu__get_slots(void) +{ + char path[PATH_MAX]; + unsigned long long slots =3D 0; + struct perf_pmu *pmu =3D NULL; + + while ((pmu =3D perf_pmu__scan(pmu)) !=3D NULL) { + if (is_pmu_core(pmu->name)) + break; + } + if (pmu) { + scnprintf(path, PATH_MAX, + EVENT_SOURCE_DEVICE_PATH "%s/caps/slots", pmu->name); + /* The value of slots is not greater than INT_MAX, but sysfs__read_int + * can't read value with 0x prefix, so use sysfs__read_ull instead. + */ + sysfs__read_ull(path, &slots); + } + return (int)slots; +} diff --git a/tools/perf/pmu-events/arch/arm64/sbsa.json b/tools/perf/pmu-ev= ents/arch/arm64/sbsa.json new file mode 100644 index 0000000..f678c37e --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/sbsa.json @@ -0,0 +1,30 @@ +[ + { + "MetricExpr": "stall_slot_frontend / (#slots * cpu_cycles)", + "BriefDescription": "Frontend bound L1 topdown metric", + "MetricGroup": "TopdownL1", + "MetricName": "frontend_bound", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "(1 - op_retired / op_spec) * (1 - stall_slot / (#sl= ots * cpu_cycles))", + "BriefDescription": "Bad speculation L1 topdown metric", + "MetricGroup": "TopdownL1", + "MetricName": "bad_speculation", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "(op_retired / op_spec) * (1 - stall_slot / (#slots = * cpu_cycles))", + "BriefDescription": "Retiring L1 topdown metric", + "MetricGroup": "TopdownL1", + "MetricName": "retiring", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "stall_slot_backend / (#slots * cpu_cycles)", + "BriefDescription": "Backend Bound L1 topdown metric", + "MetricGroup": "TopdownL1", + "MetricName": "backend_bound", + "ScaleUnit": "100%" + } +] diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-events/jeven= ts.py index 4c398e0..0416b74 100755 --- a/tools/perf/pmu-events/jevents.py +++ b/tools/perf/pmu-events/jevents.py @@ -358,6 +358,8 @@ def preprocess_arch_std_files(archpath: str) -> None: for event in read_json_events(item.path, topic=3D''): if event.name: _arch_std_events[event.name.lower()] =3D event + if event.metric_name: + _arch_std_events[event.metric_name.lower()] =3D event =20 =20 def print_events_table_prefix(tblname: str) -> None: diff --git a/tools/perf/util/expr.c b/tools/perf/util/expr.c index 00dcde3..3d67707 100644 --- a/tools/perf/util/expr.c +++ b/tools/perf/util/expr.c @@ -19,6 +19,7 @@ #include #include #include +#include "pmu.h" =20 #ifdef PARSER_DEBUG extern int expr_debug; @@ -448,6 +449,10 @@ double expr__get_literal(const char *literal, const st= ruct expr_scanner_ctx *ctx result =3D topology->core_cpus_lists; goto out; } + if (!strcmp("#slots", literal)) { + result =3D perf_pmu__get_slots(); + goto out; + } =20 pr_err("Unrecognized literal '%s'", literal); out: diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c index 2bdeb89..d4cace2 100644 --- a/tools/perf/util/pmu.c +++ b/tools/perf/util/pmu.c @@ -1993,3 +1993,8 @@ int perf_pmu__cpus_match(struct perf_pmu *pmu, struct= perf_cpu_map *cpus, *ucpus_ptr =3D unmatched_cpus; return 0; } + +int __weak perf_pmu__get_slots(void) +{ + return 0; +} diff --git a/tools/perf/util/pmu.h b/tools/perf/util/pmu.h index 69ca000..a2f7df8 100644 --- a/tools/perf/util/pmu.h +++ b/tools/perf/util/pmu.h @@ -259,4 +259,5 @@ int perf_pmu__cpus_match(struct perf_pmu *pmu, struct p= erf_cpu_map *cpus, =20 char *pmu_find_real_name(const char *name); char *pmu_find_alias_name(const char *name); +int perf_pmu__get_slots(void); #endif /* __PMU_H */ --=20 1.8.3.1 From nobody Tue Sep 16 04:23:58 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 278E8C5479D for ; Fri, 6 Jan 2023 15:06:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235430AbjAFPGI (ORCPT ); Fri, 6 Jan 2023 10:06:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234982AbjAFPFt (ORCPT ); Fri, 6 Jan 2023 10:05:49 -0500 Received: from out30-44.freemail.mail.aliyun.com (out30-44.freemail.mail.aliyun.com [115.124.30.44]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 214F35E0BE; Fri, 6 Jan 2023 07:05:46 -0800 (PST) X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R131e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=ay29a033018046050;MF=renyu.zj@linux.alibaba.com;NM=1;PH=DS;RN=21;SR=0;TI=SMTPD_---0VZ-UXmq_1673017540; Received: from srmbuffer011165236051.sqa.eu95(mailfrom:renyu.zj@linux.alibaba.com fp:SMTPD_---0VZ-UXmq_1673017540) by smtp.aliyun-inc.com; Fri, 06 Jan 2023 23:05:41 +0800 From: Jing Zhang To: John Garry , Ian Rogers Cc: Xing Zhengjun , Will Deacon , James Clark , Mike Leach , Leo Yan , linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Andrew Kilroy , Shuai Xue , Zhuo Song , Jing Zhang Subject: [PATCH v6 2/7] perf vendor events arm64: Add topdown L1 metrics for neoverse-n2-v2 Date: Fri, 6 Jan 2023 23:05:24 +0800 Message-Id: <1673017529-1429208-3-git-send-email-renyu.zj@linux.alibaba.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1673017529-1429208-1-git-send-email-renyu.zj@linux.alibaba.com> References: <1673017529-1429208-1-git-send-email-renyu.zj@linux.alibaba.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Due to the wrong count of stall_slot and stall_slot_frontend on neoverse-n2, the real stall_slot and real stall_slot_frontend need to subtract cpu_cycles, so overwrite the "MetricExpr" for neoverse-n2. Reference from ARM neoverse-n2 errata notice [0], D117. Since neoverse-n2/neoverse-v2 does not yet support topdown L2, metric groups such as Cache, TLB, Branch, InstructionsMix and PEutilization will be added to further analysis of performance bottlenecks in the following patches. Reference from ARM PMU guide [1][2]. [0] https://documentation-service.arm.com/static/636a66a64e6cf12278ad89cb?t= oken=3D [1] https://documentation-service.arm.com/static/628f8fa3dfaf015c2b76eae8?t= oken=3D [2] https://documentation-service.arm.com/static/62cfe21e31ea212bb6627393?t= oken=3D Signed-off-by: Jing Zhang Acked-by: Ian Rogers --- .../arch/arm64/arm/neoverse-n2-v2/metrics.json | 17 +++++++++++++= ++++ 1 file changed, 17 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/met= rics.json diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.js= on b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json new file mode 100644 index 0000000..4e7417f --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json @@ -0,0 +1,17 @@ +[ + { + "ArchStdEvent": "FRONTEND_BOUND", + "MetricExpr": "((stall_slot_frontend) if (#slots - 5) else (stall_= slot_frontend - cpu_cycles)) / (#slots * cpu_cycles)" + }, + { + "ArchStdEvent": "BAD_SPECULATION", + "MetricExpr": "(1 - op_retired / op_spec) * (1 - (stall_slot if (#= slots - 5) else (stall_slot - cpu_cycles)) / (#slots * cpu_cycles))" + }, + { + "ArchStdEvent": "RETIRING", + "MetricExpr": "(op_retired / op_spec) * (1 - (stall_slot if (#slot= s - 5) else (stall_slot - cpu_cycles)) / (#slots * cpu_cycles))" + }, + { + "ArchStdEvent": "BACKEND_BOUND" + } +] --=20 1.8.3.1 From nobody Tue Sep 16 04:23:58 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6155C3DA7A for ; Fri, 6 Jan 2023 15:06:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234861AbjAFPGG (ORCPT ); Fri, 6 Jan 2023 10:06:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55774 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234964AbjAFPFt (ORCPT ); Fri, 6 Jan 2023 10:05:49 -0500 Received: from out30-6.freemail.mail.aliyun.com (out30-6.freemail.mail.aliyun.com [115.124.30.6]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8CE0D390; Fri, 6 Jan 2023 07:05:47 -0800 (PST) X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R191e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=ay29a033018046049;MF=renyu.zj@linux.alibaba.com;NM=1;PH=DS;RN=21;SR=0;TI=SMTPD_---0VZ-UXmz_1673017541; Received: from srmbuffer011165236051.sqa.eu95(mailfrom:renyu.zj@linux.alibaba.com fp:SMTPD_---0VZ-UXmz_1673017541) by smtp.aliyun-inc.com; Fri, 06 Jan 2023 23:05:42 +0800 From: Jing Zhang To: John Garry , Ian Rogers Cc: Xing Zhengjun , Will Deacon , James Clark , Mike Leach , Leo Yan , linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Andrew Kilroy , Shuai Xue , Zhuo Song , Jing Zhang Subject: [PATCH v6 3/7] perf vendor events arm64: Add TLB metrics for neoverse-n2-v2 Date: Fri, 6 Jan 2023 23:05:25 +0800 Message-Id: <1673017529-1429208-4-git-send-email-renyu.zj@linux.alibaba.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1673017529-1429208-1-git-send-email-renyu.zj@linux.alibaba.com> References: <1673017529-1429208-1-git-send-email-renyu.zj@linux.alibaba.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add TLB related metrics. Signed-off-by: Jing Zhang Acked-by: Ian Rogers --- .../arch/arm64/arm/neoverse-n2-v2/metrics.json | 49 ++++++++++++++++++= ++++ 1 file changed, 49 insertions(+) diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.js= on b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json index 4e7417f..60bbd8f 100644 --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json @@ -13,5 +13,54 @@ }, { "ArchStdEvent": "BACKEND_BOUND" + }, + { + "MetricExpr": "L1D_TLB_REFILL / L1D_TLB", + "BriefDescription": "The rate of L1D TLB refill to the overall L1D= TLB lookups", + "MetricGroup": "TLB", + "MetricName": "l1d_tlb_miss_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "L1I_TLB_REFILL / L1I_TLB", + "BriefDescription": "The rate of L1I TLB refill to the overall L1I= TLB lookups", + "MetricGroup": "TLB", + "MetricName": "l1i_tlb_miss_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "L2D_TLB_REFILL / L2D_TLB", + "BriefDescription": "The rate of L2D TLB refill to the overall L2D= TLB lookups", + "MetricGroup": "TLB", + "MetricName": "l2_tlb_miss_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "DTLB_WALK / INST_RETIRED * 1000", + "BriefDescription": "The rate of TLB Walks per kilo instructions f= or data accesses", + "MetricGroup": "TLB", + "MetricName": "dtlb_mpki", + "ScaleUnit": "1MPKI" + }, + { + "MetricExpr": "DTLB_WALK / L1D_TLB", + "BriefDescription": "The rate of DTLB Walks to the overall L1D TLB= lookups", + "MetricGroup": "TLB", + "MetricName": "dtlb_walk_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "ITLB_WALK / INST_RETIRED * 1000", + "BriefDescription": "The rate of TLB Walks per kilo instructions f= or instruction accesses", + "MetricGroup": "TLB", + "MetricName": "itlb_mpki", + "ScaleUnit": "1MPKI" + }, + { + "MetricExpr": "ITLB_WALK / L1I_TLB", + "BriefDescription": "The rate of ITLB Walks to the overall L1I TLB= lookups", + "MetricGroup": "TLB", + "MetricName": "itlb_walk_rate", + "ScaleUnit": "100%" } ] --=20 1.8.3.1 From nobody Tue Sep 16 04:23:58 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99007C5479D for ; Fri, 6 Jan 2023 15:06:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234417AbjAFPGM (ORCPT ); Fri, 6 Jan 2023 10:06:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55736 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234997AbjAFPFu (ORCPT ); Fri, 6 Jan 2023 10:05:50 -0500 Received: from out30-130.freemail.mail.aliyun.com (out30-130.freemail.mail.aliyun.com [115.124.30.130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7987E23C; Fri, 6 Jan 2023 07:05:47 -0800 (PST) X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R181e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=ay29a033018046059;MF=renyu.zj@linux.alibaba.com;NM=1;PH=DS;RN=21;SR=0;TI=SMTPD_---0VZ-UXnF_1673017543; Received: from srmbuffer011165236051.sqa.eu95(mailfrom:renyu.zj@linux.alibaba.com fp:SMTPD_---0VZ-UXnF_1673017543) by smtp.aliyun-inc.com; Fri, 06 Jan 2023 23:05:43 +0800 From: Jing Zhang To: John Garry , Ian Rogers Cc: Xing Zhengjun , Will Deacon , James Clark , Mike Leach , Leo Yan , linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Andrew Kilroy , Shuai Xue , Zhuo Song , Jing Zhang Subject: [PATCH v6 4/7] perf vendor events arm64: Add cache metrics for neoverse-n2-v2 Date: Fri, 6 Jan 2023 23:05:26 +0800 Message-Id: <1673017529-1429208-5-git-send-email-renyu.zj@linux.alibaba.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1673017529-1429208-1-git-send-email-renyu.zj@linux.alibaba.com> References: <1673017529-1429208-1-git-send-email-renyu.zj@linux.alibaba.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add cache related metrics. Signed-off-by: Jing Zhang Acked-by: Ian Rogers --- .../arch/arm64/arm/neoverse-n2-v2/metrics.json | 77 ++++++++++++++++++= ++++ 1 file changed, 77 insertions(+) diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.js= on b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json index 60bbd8f..08c6aaa 100644 --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json @@ -62,5 +62,82 @@ "MetricGroup": "TLB", "MetricName": "itlb_walk_rate", "ScaleUnit": "100%" + }, + { + "MetricExpr": "L1I_CACHE_REFILL / INST_RETIRED * 1000", + "BriefDescription": "The rate of L1 I-Cache misses per kilo instru= ctions", + "MetricGroup": "Cache", + "MetricName": "l1i_cache_mpki", + "ScaleUnit": "1MPKI" + }, + { + "MetricExpr": "L1I_CACHE_REFILL / L1I_CACHE", + "BriefDescription": "The rate of L1 I-Cache misses to the overall = L1 I-Cache", + "MetricGroup": "Cache", + "MetricName": "l1i_cache_miss_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "L1D_CACHE_REFILL / INST_RETIRED * 1000", + "BriefDescription": "The rate of L1 D-Cache misses per kilo instru= ctions", + "MetricGroup": "Cache", + "MetricName": "l1d_cache_mpki", + "ScaleUnit": "1MPKI" + }, + { + "MetricExpr": "L1D_CACHE_REFILL / L1D_CACHE", + "BriefDescription": "The rate of L1 D-Cache misses to the overall = L1 D-Cache", + "MetricGroup": "Cache", + "MetricName": "l1d_cache_miss_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "L2D_CACHE_REFILL / INST_RETIRED * 1000", + "BriefDescription": "The rate of L2 D-Cache misses per kilo instru= ctions", + "MetricGroup": "Cache", + "MetricName": "l2d_cache_mpki", + "ScaleUnit": "1MPKI" + }, + { + "MetricExpr": "L2D_CACHE_REFILL / L2D_CACHE", + "BriefDescription": "The rate of L2 D-Cache misses to the overall = L2 D-Cache", + "MetricGroup": "Cache", + "MetricName": "l2d_cache_miss_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "L3D_CACHE_REFILL / INST_RETIRED * 1000", + "BriefDescription": "The rate of L3 D-Cache misses per kilo instru= ctions", + "MetricGroup": "Cache", + "MetricName": "l3d_cache_mpki", + "ScaleUnit": "1MPKI" + }, + { + "MetricExpr": "L3D_CACHE_REFILL / L3D_CACHE", + "BriefDescription": "The rate of L3 D-Cache misses to the overall = L3 D-Cache", + "MetricGroup": "Cache", + "MetricName": "l3d_cache_miss_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "LL_CACHE_MISS_RD / INST_RETIRED * 1000", + "BriefDescription": "The rate of LL Cache read misses per kilo ins= tructions", + "MetricGroup": "Cache", + "MetricName": "ll_cache_read_mpki", + "ScaleUnit": "1MPKI" + }, + { + "MetricExpr": "LL_CACHE_MISS_RD / LL_CACHE_RD", + "BriefDescription": "The rate of LL Cache read misses to the overa= ll LL Cache read", + "MetricGroup": "Cache", + "MetricName": "ll_cache_read_miss_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "(LL_CACHE_RD - LL_CACHE_MISS_RD) / LL_CACHE_RD", + "BriefDescription": "The rate of LL Cache read hit to the overall = LL Cache read", + "MetricGroup": "Cache", + "MetricName": "ll_cache_read_hit_rate", + "ScaleUnit": "100%" } ] --=20 1.8.3.1 From nobody Tue Sep 16 04:23:58 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3DF5EC4708D for ; Fri, 6 Jan 2023 15:06:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235295AbjAFPGB (ORCPT ); Fri, 6 Jan 2023 10:06:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55682 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233398AbjAFPFu (ORCPT ); Fri, 6 Jan 2023 10:05:50 -0500 Received: from out30-1.freemail.mail.aliyun.com (out30-1.freemail.mail.aliyun.com [115.124.30.1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 491B72701; Fri, 6 Jan 2023 07:05:49 -0800 (PST) X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R111e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=ay29a033018045168;MF=renyu.zj@linux.alibaba.com;NM=1;PH=DS;RN=21;SR=0;TI=SMTPD_---0VZ-UXnY_1673017544; Received: from srmbuffer011165236051.sqa.eu95(mailfrom:renyu.zj@linux.alibaba.com fp:SMTPD_---0VZ-UXnY_1673017544) by smtp.aliyun-inc.com; Fri, 06 Jan 2023 23:05:44 +0800 From: Jing Zhang To: John Garry , Ian Rogers Cc: Xing Zhengjun , Will Deacon , James Clark , Mike Leach , Leo Yan , linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Andrew Kilroy , Shuai Xue , Zhuo Song , Jing Zhang Subject: [PATCH v6 5/7] perf vendor events arm64: Add branch metrics for neoverse-n2-v2 Date: Fri, 6 Jan 2023 23:05:27 +0800 Message-Id: <1673017529-1429208-6-git-send-email-renyu.zj@linux.alibaba.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1673017529-1429208-1-git-send-email-renyu.zj@linux.alibaba.com> References: <1673017529-1429208-1-git-send-email-renyu.zj@linux.alibaba.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add branch related metrics. Signed-off-by: Jing Zhang Acked-by: Ian Rogers --- .../arch/arm64/arm/neoverse-n2-v2/metrics.json | 21 +++++++++++++++++= ++++ 1 file changed, 21 insertions(+) diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.js= on b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json index 08c6aaa..afcdb17 100644 --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json @@ -139,5 +139,26 @@ "MetricGroup": "Cache", "MetricName": "ll_cache_read_hit_rate", "ScaleUnit": "100%" + }, + { + "MetricExpr": "BR_MIS_PRED_RETIRED / INST_RETIRED * 1000", + "BriefDescription": "The rate of branches mis-predicted per kilo i= nstructions", + "MetricGroup": "Branch", + "MetricName": "branch_mpki", + "ScaleUnit": "1MPKI" + }, + { + "MetricExpr": "BR_RETIRED / INST_RETIRED * 1000", + "BriefDescription": "The rate of branches retired per kilo instruc= tions", + "MetricGroup": "Branch", + "MetricName": "branch_pki", + "ScaleUnit": "1PKI" + }, + { + "MetricExpr": "BR_MIS_PRED_RETIRED / BR_RETIRED", + "BriefDescription": "The rate of branches mis-predited to the over= all branches", + "MetricGroup": "Branch", + "MetricName": "branch_miss_pred_rate", + "ScaleUnit": "100%" } ] --=20 1.8.3.1 From nobody Tue Sep 16 04:23:58 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2717C3DA7A for ; Fri, 6 Jan 2023 15:06:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235408AbjAFPGZ (ORCPT ); Fri, 6 Jan 2023 10:06:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55792 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234786AbjAFPFw (ORCPT ); Fri, 6 Jan 2023 10:05:52 -0500 Received: from out30-42.freemail.mail.aliyun.com (out30-42.freemail.mail.aliyun.com [115.124.30.42]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 669D653719; Fri, 6 Jan 2023 07:05:50 -0800 (PST) X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R171e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=ay29a033018045192;MF=renyu.zj@linux.alibaba.com;NM=1;PH=DS;RN=21;SR=0;TI=SMTPD_---0VZ-UXnu_1673017545; Received: from srmbuffer011165236051.sqa.eu95(mailfrom:renyu.zj@linux.alibaba.com fp:SMTPD_---0VZ-UXnu_1673017545) by smtp.aliyun-inc.com; Fri, 06 Jan 2023 23:05:45 +0800 From: Jing Zhang To: John Garry , Ian Rogers Cc: Xing Zhengjun , Will Deacon , James Clark , Mike Leach , Leo Yan , linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Andrew Kilroy , Shuai Xue , Zhuo Song , Jing Zhang Subject: [PATCH v6 6/7] perf vendor events arm64: Add PE utilization metrics for neoverse-n2-v2 Date: Fri, 6 Jan 2023 23:05:28 +0800 Message-Id: <1673017529-1429208-7-git-send-email-renyu.zj@linux.alibaba.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1673017529-1429208-1-git-send-email-renyu.zj@linux.alibaba.com> References: <1673017529-1429208-1-git-send-email-renyu.zj@linux.alibaba.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add PE utilization related metrics. In cpu_utilization metric, if it is neoverse-n2 judged by #slot, the real stall_slot need to subtract the cpu_cycles according to the neoverse-n2 errata [0]. [0] https://documentation-service.arm.com/static/636a66a64e6cf12278ad89cb?t= oken=3D Signed-off-by: Jing Zhang Acked-by: Ian Rogers --- .../arch/arm64/arm/neoverse-n2-v2/metrics.json | 46 ++++++++++++++++++= ++++ 1 file changed, 46 insertions(+) diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.js= on b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json index afcdb17..3d6ac0c 100644 --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json @@ -160,5 +160,51 @@ "MetricGroup": "Branch", "MetricName": "branch_miss_pred_rate", "ScaleUnit": "100%" + }, + { + "MetricExpr": "instructions / CPU_CYCLES", + "BriefDescription": "The average number of instructions executed f= or each cycle.", + "MetricGroup": "PEutilization", + "MetricName": "ipc" + }, + { + "MetricExpr": "ipc / 5", + "BriefDescription": "IPC percentage of peak. The peak of IPC is 5.= ", + "MetricGroup": "PEutilization", + "MetricName": "ipc_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "INST_RETIRED / CPU_CYCLES", + "BriefDescription": "Architecturally executed Instructions Per Cyc= le (IPC)", + "MetricGroup": "PEutilization", + "MetricName": "retired_ipc" + }, + { + "MetricExpr": "INST_SPEC / CPU_CYCLES", + "BriefDescription": "Speculatively executed Instructions Per Cycle= (IPC)", + "MetricGroup": "PEutilization", + "MetricName": "spec_ipc" + }, + { + "MetricExpr": "OP_RETIRED / OP_SPEC", + "BriefDescription": "Of all the micro-operations issued, what perc= entage are retired(committed)", + "MetricGroup": "PEutilization", + "MetricName": "retired_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "1 - OP_RETIRED / OP_SPEC", + "BriefDescription": "Of all the micro-operations issued, what perc= entage are not retired(committed)", + "MetricGroup": "PEutilization", + "MetricName": "wasted_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "OP_RETIRED / OP_SPEC * (1 - (STALL_SLOT if (#slots = - 5) else (STALL_SLOT - CPU_CYCLES)) / (#slots * CPU_CYCLES))", + "BriefDescription": "The truly effective ratio of micro-operations= executed by the CPU, which means that misprediction and stall are not incl= uded", + "MetricGroup": "PEutilization", + "MetricName": "cpu_utilization", + "ScaleUnit": "100%" } ] --=20 1.8.3.1 From nobody Tue Sep 16 04:23:58 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3AE76C4708D for ; Fri, 6 Jan 2023 15:06:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229767AbjAFPGV (ORCPT ); Fri, 6 Jan 2023 10:06:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55794 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235017AbjAFPFx (ORCPT ); Fri, 6 Jan 2023 10:05:53 -0500 Received: from out30-6.freemail.mail.aliyun.com (out30-6.freemail.mail.aliyun.com [115.124.30.6]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DE9D9687B9; Fri, 6 Jan 2023 07:05:51 -0800 (PST) X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R551e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=ay29a033018046059;MF=renyu.zj@linux.alibaba.com;NM=1;PH=DS;RN=21;SR=0;TI=SMTPD_---0VZ-UXoG_1673017546; Received: from srmbuffer011165236051.sqa.eu95(mailfrom:renyu.zj@linux.alibaba.com fp:SMTPD_---0VZ-UXoG_1673017546) by smtp.aliyun-inc.com; Fri, 06 Jan 2023 23:05:46 +0800 From: Jing Zhang To: John Garry , Ian Rogers Cc: Xing Zhengjun , Will Deacon , James Clark , Mike Leach , Leo Yan , linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Andrew Kilroy , Shuai Xue , Zhuo Song , Jing Zhang Subject: [PATCH v6 7/7] perf vendor events arm64: Add instruction mix metrics for neoverse-n2-v2 Date: Fri, 6 Jan 2023 23:05:29 +0800 Message-Id: <1673017529-1429208-8-git-send-email-renyu.zj@linux.alibaba.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1673017529-1429208-1-git-send-email-renyu.zj@linux.alibaba.com> References: <1673017529-1429208-1-git-send-email-renyu.zj@linux.alibaba.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add instruction mix related metrics. Signed-off-by: Jing Zhang Acked-by: Ian Rogers --- .../arch/arm64/arm/neoverse-n2-v2/metrics.json | 63 ++++++++++++++++++= ++++ 1 file changed, 63 insertions(+) diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.js= on b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json index 3d6ac0c..8ad15b7 100644 --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json @@ -206,5 +206,68 @@ "MetricGroup": "PEutilization", "MetricName": "cpu_utilization", "ScaleUnit": "100%" + }, + { + "MetricExpr": "LD_SPEC / INST_SPEC", + "BriefDescription": "The rate of load instructions speculatively e= xecuted to overall instructions speclatively executed", + "MetricGroup": "InstructionMix", + "MetricName": "load_spec_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "ST_SPEC / INST_SPEC", + "BriefDescription": "The rate of store instructions speculatively = executed to overall instructions speclatively executed", + "MetricGroup": "InstructionMix", + "MetricName": "store_spec_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "DP_SPEC / INST_SPEC", + "BriefDescription": "The rate of integer data-processing instructi= ons speculatively executed to overall instructions speclatively executed", + "MetricGroup": "InstructionMix", + "MetricName": "data_process_spec_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "ASE_SPEC / INST_SPEC", + "BriefDescription": "The rate of advanced SIMD instructions specul= atively executed to overall instructions speclatively executed", + "MetricGroup": "InstructionMix", + "MetricName": "advanced_simd_spec_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "VFP_SPEC / INST_SPEC", + "BriefDescription": "The rate of floating point instructions specu= latively executed to overall instructions speclatively executed", + "MetricGroup": "InstructionMix", + "MetricName": "float_point_spec_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "CRYPTO_SPEC / INST_SPEC", + "BriefDescription": "The rate of crypto instructions speculatively= executed to overall instructions speclatively executed", + "MetricGroup": "InstructionMix", + "MetricName": "crypto_spec_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "BR_IMMED_SPEC / INST_SPEC", + "BriefDescription": "The rate of branch immediate instructions spe= culatively executed to overall instructions speclatively executed", + "MetricGroup": "InstructionMix", + "MetricName": "branch_immed_spec_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "BR_RETURN_SPEC / INST_SPEC", + "BriefDescription": "The rate of procedure return instructions spe= culatively executed to overall instructions speclatively executed", + "MetricGroup": "InstructionMix", + "MetricName": "branch_return_spec_rate", + "ScaleUnit": "100%" + }, + { + "MetricExpr": "BR_INDIRECT_SPEC / INST_SPEC", + "BriefDescription": "The rate of indirect branch instructions spec= ulatively executed to overall instructions speclatively executed", + "MetricGroup": "InstructionMix", + "MetricName": "branch_indirect_spec_rate", + "ScaleUnit": "100%" } ] --=20 1.8.3.1