From nobody Wed Sep 17 17:47:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9B431C4167B for ; Fri, 16 Dec 2022 21:45:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229830AbiLPVph (ORCPT ); Fri, 16 Dec 2022 16:45:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33526 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229704AbiLPVpZ (ORCPT ); Fri, 16 Dec 2022 16:45:25 -0500 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 971856C716; Fri, 16 Dec 2022 13:45:23 -0800 (PST) Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2BGLF5vv000316; Fri, 16 Dec 2022 21:45:15 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=3mpWnZHcLxtFObb6ANYSgR5qTraxgu8d0FEDD5nCM54=; b=p4dJsCz8KrqmgS0B84m4QfbPbM28Ybx6jMMYWZ9tRa9HggASbRV3LwBiejizzgDg9upS 858tIlzXPvDmZ4IzUHunGogTYwsbuYPLyzygo9LF2NsIug5TP8ChtNQdHLFuVbxV8Zdb hKYlkUrXop8/RucWHo0gUUFNA3SqFMrQ5nHhwX0Ul1Pu/zp52zp71jkCnXkvZxkoa0D/ QB/QJVaSXTqpBlXI+st+8wo+S+cBkFb7oYWAMak/Bm6WpxI+XUHjHN270QxysdsL8DXg CF3PTVAI5Ei3gfp1ErnfiG+icXOn3kgWVEmHqlttUGyZXTqhD+gBqmWCPPerW7u8jXyp 5w== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3mgufm10yj-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Dec 2022 21:45:15 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2BGLjDwL027919 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Dec 2022 21:45:14 GMT Received: from khsieh-linux1.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Fri, 16 Dec 2022 13:45:13 -0800 From: Kuogee Hsieh To: , , , , , , , , , , , , , , CC: Kuogee Hsieh , , , , , Subject: [PATCH v15 1/5] arm64: dts: qcom: add data-lanes and link-freuencies into dp_out endpoint Date: Fri, 16 Dec 2022 13:44:58 -0800 Message-ID: <1671227102-21717-2-git-send-email-quic_khsieh@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1671227102-21717-1-git-send-email-quic_khsieh@quicinc.com> References: <1671227102-21717-1-git-send-email-quic_khsieh@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: LrBmdwtfkQJ9NTRxpLEu_pJWvK48B9Tt X-Proofpoint-GUID: LrBmdwtfkQJ9NTRxpLEu_pJWvK48B9Tt X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-16_14,2022-12-15_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 bulkscore=0 adultscore=0 malwarescore=0 phishscore=0 suspectscore=0 mlxlogscore=999 impostorscore=0 priorityscore=1501 clxscore=1015 spamscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2212160193 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move data-lanes property from mdss_dp node to dp_out endpoint. Also add link-frequencies property into dp_out endpoint as well. The last frequency specified at link-frequencies will be the max link rate supported by DP. Changes in v5: -- revert changes at sc7180.dtsi and sc7280.dtsi -- add &dp_out to sc7180-trogdor.dtsi and sc7280-herobrine.dtsi Changes in v6: -- add data-lanes and link-frequencies to yaml Changes in v7: -- change 160000000 to 1620000000 -- separate yaml to different patch Changes in v8: -- correct Bjorn mail address to kernel.org Changes in v9: -- use symbol rate (hz) for link-frequencies at dp_out at sc7180_trogdor.dt= si Changes in v13: -- delete an extra space at data-lanes Changes in v15: -- replace space with tab at sc7180-trogdor.dtsi Signed-off-by: Kuogee Hsieh --- arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 4 ++++ arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot= /dts/qcom/sc7180-trogdor.dtsi index eae22e6..ad98a87 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -814,7 +814,11 @@ hp_i2c: &i2c9 { status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&dp_hot_plug_det>; +}; + +&dp_out { data-lanes =3D <0 1>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000>; }; =20 &pm6150_adc { diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/bo= ot/dts/qcom/sc7280-herobrine.dtsi index c11e371..3f363f8 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi @@ -442,7 +442,11 @@ ap_i2c_tpm: &i2c14 { status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&dp_hot_plug_det>; +}; + +&dp_out { data-lanes =3D <0 1>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; }; =20 &mdss_mdp { --=20 The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project From nobody Wed Sep 17 17:47:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B118EC4332F for ; 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Fri, 16 Dec 2022 21:45:17 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2BGLjGbT009924 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Dec 2022 21:45:16 GMT Received: from khsieh-linux1.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Fri, 16 Dec 2022 13:45:15 -0800 From: Kuogee Hsieh To: , , , , , , , , , , , , , , CC: Kuogee Hsieh , , , , , Subject: [PATCH v15 2/5] dt-bindings: msm/dp: add data-lanes and link-frequencies property Date: Fri, 16 Dec 2022 13:44:59 -0800 Message-ID: <1671227102-21717-3-git-send-email-quic_khsieh@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1671227102-21717-1-git-send-email-quic_khsieh@quicinc.com> References: <1671227102-21717-1-git-send-email-quic_khsieh@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: RZS8LEvUO3HR7EjTbZm10Y2I-qctHWxt X-Proofpoint-GUID: RZS8LEvUO3HR7EjTbZm10Y2I-qctHWxt X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-16_14,2022-12-15_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 bulkscore=0 adultscore=0 malwarescore=0 phishscore=0 suspectscore=0 mlxlogscore=999 impostorscore=0 priorityscore=1501 clxscore=1015 spamscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2212160193 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" To increase the flexibility of supporting different DP main link configurat= ion at different platform, add both data-lanes and link-frequencies property into endpoint so that different platform can specify its own main link combination of both data lanes and max supported link rate. Changes in v7: -- split yaml out of dtsi patch -- link-frequencies from link rate to symbol rate -- deprecation of old data-lanes property Changes in v8: -- correct Bjorn mail address to kernel.org Changes in v10: -- add menu item to data-lanes and link-frequecnis Changes in v11: -- add endpoint property at port@1 Changes in v12: -- use enum for item at data-lanes and link-frequencies Changes in v13: -- revised changes at port@0 -- use correct ref schemas for both port@0 and port@1 -- mark both port@0 and port@1 are required -- add line between data-lanes and link-frequencies properties Changes in v14: -- add "unevaluatedProperties: false: to endpoint at port@1 -- remove unnecessary quote to $ref -- re store "$ref: /schemas/graph.yaml#/properties/port" to port@0 Changes in v15: -- re store desciption of port@0 Signed-off-by: Kuogee Hsieh Reviewed-by: Rob Herring --- .../bindings/display/msm/dp-controller.yaml | 25 ++++++++++++++++++= +++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.ya= ml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index f2515af..774ccb5 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -81,6 +81,7 @@ properties: =20 data-lanes: $ref: /schemas/types.yaml#/definitions/uint32-array + deprecated: true minItems: 1 maxItems: 4 items: @@ -102,8 +103,28 @@ properties: description: Input endpoint of the controller =20 port@1: - $ref: /schemas/graph.yaml#/properties/port + $ref: /schemas/graph.yaml#/$defs/port-base description: Output endpoint of the controller + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + properties: + data-lanes: + minItems: 1 + maxItems: 4 + items: + enum: [ 0, 1, 2, 3 ] + + link-frequencies: + minItems: 1 + maxItems: 4 + items: + enum: [ 1620000000, 2700000000, 5400000000, 8100000000 ] + + required: + - port@0 + - port@1 =20 required: - compatible @@ -193,6 +214,8 @@ examples: reg =3D <1>; endpoint { remote-endpoint =3D <&typec>; + data-lanes =3D <0 1>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 = 5400000000 8100000000>; }; }; }; --=20 The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project From nobody Wed Sep 17 17:47:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 441CEC4332F for ; Fri, 16 Dec 2022 21:45:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229927AbiLPVpu (ORCPT ); Fri, 16 Dec 2022 16:45:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33524 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229667AbiLPVp3 (ORCPT ); Fri, 16 Dec 2022 16:45:29 -0500 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7CB296DCFF; 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charset="utf-8" Add capability to parser data-lanes as property of dp_out endpoint. Also retain the original capability to parser data-lanes as property of mdss_dp node to handle legacy case. Changes in v6: -- first patch after split parser patch into two Changes in v7: -- check "data-lanes" from endpoint first Changes in v14: -- replace "parser" with "parse" at commit subject -- add matching brackets at dp_parser_misc() Changes in v15: -- concise dp_parser_misc() Signed-off-by: Kuogee Hsieh Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_parser.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp= _parser.c index dd73221..e3ba322 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.c +++ b/drivers/gpu/drm/msm/dp/dp_parser.c @@ -94,16 +94,22 @@ static int dp_parser_ctrl_res(struct dp_parser *parser) static int dp_parser_misc(struct dp_parser *parser) { struct device_node *of_node =3D parser->pdev->dev.of_node; - int len; - - len =3D drm_of_get_data_lanes_count(of_node, 1, DP_MAX_NUM_DP_LANES); - if (len < 0) { - DRM_WARN("Invalid property \"data-lanes\", default max DP lanes =3D %d\n= ", - DP_MAX_NUM_DP_LANES); - len =3D DP_MAX_NUM_DP_LANES; + int cnt; + + /* + * data-lanes is the property of dp_out endpoint + */ + cnt =3D drm_of_get_data_lanes_count_ep(of_node, 1, 0, 1, DP_MAX_NUM_DP_LA= NES); + if (cnt < 0) { + /* legacy code, data-lanes is the property of mdss_dp node */ + cnt =3D drm_of_get_data_lanes_count(of_node, 1, DP_MAX_NUM_DP_LANES); } =20 - parser->max_dp_lanes =3D len; + if (cnt > 0) + parser->max_dp_lanes =3D cnt; + else + parser->max_dp_lanes =3D DP_MAX_NUM_DP_LANES; /* 4 lanes */ + return 0; } =20 --=20 The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project From nobody Wed Sep 17 17:47:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E496FC4332F for ; Fri, 16 Dec 2022 21:46:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229603AbiLPVqK (ORCPT ); Fri, 16 Dec 2022 16:46:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33544 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229705AbiLPVpb (ORCPT ); Fri, 16 Dec 2022 16:45:31 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 181B66C716; Fri, 16 Dec 2022 13:45:31 -0800 (PST) Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2BGKd0Vo030801; Fri, 16 Dec 2022 21:45:20 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=2oEu5kV5NSvp+e6NqVD0jrxmHSZkM/q7dHGy8yztSLw=; b=Yxj2CBUBXUJYFIrxjnrE2eTIIGfY22TpOBPYln6Wgc4xF9KEZ7dn/qalPdkeU8O7Ajr7 e64rnvUSja1XePaBwz2wSPX7OpETsU4OF1olxIkGc8gOfx7OBoGfxhw0Lci9EfNZt62t F3CQkG9q24O/5ixuCLMvEZ9+fN2y7MXS3+U/sKfWSQ1eVQvbbaxR9hTCPnmdisWHdUNv 2JH2PZ/qtG2rKo0yaGETE8PQeUGMa/ZXGk3Uo8WDrC7FlEIdO9TOuJtqfHVmjwLkDSF4 QsG/4hZSTkIH6fwlGlyjLDCp3oinA4TvvGMXueNyAYxbnW23m4hHqoM1JLbPnZ0ujQRa 5g== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3mg2vwda2s-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Dec 2022 21:45:20 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2BGLjJ0w020944 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Dec 2022 21:45:19 GMT Received: from khsieh-linux1.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Fri, 16 Dec 2022 13:45:18 -0800 From: Kuogee Hsieh To: , , , , , , , , , , , , , , CC: Kuogee Hsieh , , , , , Subject: [PATCH v15 4/5] Add capability to parser and retrieve max DP link supported rate from link-frequencies property of dp_out endpoint. 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charset="utf-8" Changes in v6: -- second patch after split parser patch into two patches Changes in v7: -- without checking cnt against DP_MAX_NUM_DP_LANES to retrieve link rate Changes in v9: -- separate parser link-frequencies out of data-lanes Changes in v10: -- add dp_parser_link_frequencies() Changes in v11: -- return 0 if(!endpoint) Changes in v12: -- replace khz with kbytes at dp_parser.h Changes in v14: -- replace "parser" with "parse" at commit subject -- use do_div() for 64 bits division Signed-off-by: Kuogee Hsieh Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_parser.c | 28 ++++++++++++++++++++++++++++ drivers/gpu/drm/msm/dp/dp_parser.h | 2 ++ 2 files changed, 30 insertions(+) diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp= _parser.c index e3ba322..42c0793 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.c +++ b/drivers/gpu/drm/msm/dp/dp_parser.c @@ -91,6 +91,30 @@ static int dp_parser_ctrl_res(struct dp_parser *parser) return 0; } =20 +static u32 dp_parser_link_frequencies(struct device_node *of_node) +{ + struct device_node *endpoint; + u64 frequency =3D 0; + int cnt; + + endpoint =3D of_graph_get_endpoint_by_regs(of_node, 1, 0); /* port@1 */ + if (!endpoint) + return 0; + + cnt =3D of_property_count_u64_elems(endpoint, "link-frequencies"); + + if (cnt > 0) + of_property_read_u64_index(endpoint, "link-frequencies", + cnt - 1, &frequency); + of_node_put(endpoint); + + do_div(frequency, + 10 * /* from symbol rate to link rate */ + 1000); /* kbytes */ + + return frequency; +} + static int dp_parser_misc(struct dp_parser *parser) { struct device_node *of_node =3D parser->pdev->dev.of_node; @@ -110,6 +134,10 @@ static int dp_parser_misc(struct dp_parser *parser) else parser->max_dp_lanes =3D DP_MAX_NUM_DP_LANES; /* 4 lanes */ =20 + parser->max_dp_link_rate =3D dp_parser_link_frequencies(of_node); + if (!parser->max_dp_link_rate) + parser->max_dp_link_rate =3D DP_LINK_RATE_HBR2; + return 0; } =20 diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp= _parser.h index 866c1a8..526131ee 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.h +++ b/drivers/gpu/drm/msm/dp/dp_parser.h @@ -15,6 +15,7 @@ #define DP_LABEL "MDSS DP DISPLAY" #define DP_MAX_PIXEL_CLK_KHZ 675000 #define DP_MAX_NUM_DP_LANES 4 +#define DP_LINK_RATE_HBR2 540000 /* kbytes */ =20 enum dp_pm_type { DP_CORE_PM, @@ -119,6 +120,7 @@ struct dp_parser { struct dp_io io; struct dp_display_data disp_data; u32 max_dp_lanes; + u32 max_dp_link_rate; struct drm_bridge *next_bridge; =20 int (*parse)(struct dp_parser *parser); --=20 The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project From nobody Wed Sep 17 17:47:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C33DC4332F for ; Fri, 16 Dec 2022 21:46:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229951AbiLPVp7 (ORCPT ); Fri, 16 Dec 2022 16:45:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33526 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229752AbiLPVpb (ORCPT ); Fri, 16 Dec 2022 16:45:31 -0500 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 63BD16BCA7; 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charset="utf-8" By default, HBR2 (5.4G) is the max link rate be supported. This patch uses the actual limit specified by DT and removes the artificial limitation to 5.4 Gbps. Supporting HBR3 is a consequence of that. Changes in v2: -- add max link rate from dtsi Changes in v3: -- parser max_data_lanes and max_dp_link_rate from dp_out endpoint Changes in v4: -- delete unnecessary pr_err Changes in v5: -- split parser function into different patch Changes in v9: -- revised commit test Changes in v13: -- repalced "properity" with "property" Signed-off-by: Kuogee Hsieh Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_display.c | 4 ++++ drivers/gpu/drm/msm/dp/dp_panel.c | 7 ++++--- drivers/gpu/drm/msm/dp/dp_panel.h | 1 + 3 files changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/d= p_display.c index bfd0aef..edee550 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -390,6 +390,10 @@ static int dp_display_process_hpd_high(struct dp_displ= ay_private *dp) struct edid *edid; =20 dp->panel->max_dp_lanes =3D dp->parser->max_dp_lanes; + dp->panel->max_dp_link_rate =3D dp->parser->max_dp_link_rate; + + drm_dbg_dp(dp->drm_dev, "max_lanes=3D%d max_link_rate=3D%d\n", + dp->panel->max_dp_lanes, dp->panel->max_dp_link_rate); =20 rc =3D dp_panel_read_sink_caps(dp->panel, dp->dp_display.connector); if (rc) diff --git a/drivers/gpu/drm/msm/dp/dp_panel.c b/drivers/gpu/drm/msm/dp/dp_= panel.c index 5149ceb..1800d89 100644 --- a/drivers/gpu/drm/msm/dp/dp_panel.c +++ b/drivers/gpu/drm/msm/dp/dp_panel.c @@ -75,12 +75,13 @@ static int dp_panel_read_dpcd(struct dp_panel *dp_panel) link_info->rate =3D drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]); link_info->num_lanes =3D dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; =20 + /* Limit data lanes from data-lanes of endpoint property of dtsi */ if (link_info->num_lanes > dp_panel->max_dp_lanes) link_info->num_lanes =3D dp_panel->max_dp_lanes; =20 - /* Limit support upto HBR2 until HBR3 support is added */ - if (link_info->rate >=3D (drm_dp_bw_code_to_link_rate(DP_LINK_BW_5_4))) - link_info->rate =3D drm_dp_bw_code_to_link_rate(DP_LINK_BW_5_4); + /* Limit link rate from link-frequencies of endpoint property of dtsi */ + if (link_info->rate > dp_panel->max_dp_link_rate) + link_info->rate =3D dp_panel->max_dp_link_rate; =20 drm_dbg_dp(panel->drm_dev, "version: %d.%d\n", major, minor); drm_dbg_dp(panel->drm_dev, "link_rate=3D%d\n", link_info->rate); diff --git a/drivers/gpu/drm/msm/dp/dp_panel.h b/drivers/gpu/drm/msm/dp/dp_= panel.h index d861197a..f04d021 100644 --- a/drivers/gpu/drm/msm/dp/dp_panel.h +++ b/drivers/gpu/drm/msm/dp/dp_panel.h @@ -50,6 +50,7 @@ struct dp_panel { =20 u32 vic; u32 max_dp_lanes; + u32 max_dp_link_rate; =20 u32 max_bw_code; }; --=20 The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project