From nobody Sat Sep 21 11:31:21 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8FF20C43219 for ; Thu, 20 Oct 2022 11:46:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231473AbiJTLqS (ORCPT ); Thu, 20 Oct 2022 07:46:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37370 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231475AbiJTLqM (ORCPT ); Thu, 20 Oct 2022 07:46:12 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0C436132DD8; Thu, 20 Oct 2022 04:46:08 -0700 (PDT) X-UUID: c260e7623f7d421f80a0774c8674b3af-20221020 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=NV7/biiNpmvDMy3keqojWAK7SpRHqd9pBuTEI3/Uu4k=; b=Wrt9GgrpgRDCXODU1A4ygnxXaOVWQzpLUo+DkKkUBMoMz+b7NDgQYLE5fBJP/bq+l6IvwY/806MyOIyzXUMHpcTXFFIyJRtzfT6Kze4v2Y1QbDEalxL9cahjQ8PfbUxqEdLY8IwMc43oobpOGVMfVJQ5CGeloxL47Tit/A3+eL8=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.12,REQID:355ee3b6-b978-4897-8f56-783250f412f1,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:62cd327,CLOUDID:87556da4-ebb2-41a8-a87c-97702aaf2e20,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: c260e7623f7d421f80a0774c8674b3af-20221020 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 734755674; Thu, 20 Oct 2022 19:46:02 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 20 Oct 2022 19:46:00 +0800 Received: from mszsdaap41.gcn.mediatek.inc (10.16.6.141) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 20 Oct 2022 19:46:00 +0800 From: To: , , , , , , , , CC: , , , , , , xinlei lee Subject: [PATCH v2,2/2] drm: mediatek: Add mt8188 dpi compatibles and platform data Date: Thu, 20 Oct 2022 19:45:53 +0800 Message-ID: <1666266353-16670-3-git-send-email-xinlei.lee@mediatek.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1666266353-16670-1-git-send-email-xinlei.lee@mediatek.com> References: <1666266353-16670-1-git-send-email-xinlei.lee@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: xinlei lee For MT8188, the vdosys0 only supports 1T1P mode, so we need to add the comp= atible for mt8188 edp-intf. Signed-off-by: xinlei lee --- drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +++++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++ 2 files changed, 19 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/= mtk_dpi.c index 508a6d9..02c2a00 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -929,6 +929,20 @@ static const struct mtk_dpi_conf mt8183_conf =3D { .csc_enable_bit =3D CSC_ENABLE, }; =20 +static const struct mtk_dpi_conf mt8188_dpintf_conf =3D { + .cal_factor =3D mt8195_dpintf_calculate_factor, + .max_clock_khz =3D 600000, + .output_fmts =3D mt8195_output_fmts, + .num_output_fmts =3D ARRAY_SIZE(mt8195_output_fmts), + .pixels_per_iter =3D 4, + .input_2pixel =3D false, + .dimension_mask =3D DPINTF_HPW_MASK, + .hvsize_mask =3D DPINTF_HSIZE_MASK, + .channel_swap_shift =3D DPINTF_CH_SWAP, + .yuv422_en_bit =3D DPINTF_YUV422_EN, + .csc_enable_bit =3D DPINTF_CSC_ENABLE, +}; + static const struct mtk_dpi_conf mt8192_conf =3D { .cal_factor =3D mt8183_calculate_factor, .reg_h_fre_con =3D 0xe0, @@ -1079,6 +1093,9 @@ static const struct of_device_id mtk_dpi_of_ids[] =3D= { { .compatible =3D "mediatek,mt8183-dpi", .data =3D &mt8183_conf, }, + { .compatible =3D "mediatek,mt8188-dp-intf", + .data =3D &mt8188_dpintf_conf, + }, { .compatible =3D "mediatek,mt8192-dpi", .data =3D &mt8192_conf, }, diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/media= tek/mtk_drm_drv.c index 91f58db..950bd04 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -631,6 +631,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = =3D { .data =3D (void *)MTK_DPI }, { .compatible =3D "mediatek,mt8183-dpi", .data =3D (void *)MTK_DPI }, + { .compatible =3D "mediatek,mt8188-dp-intf", + .data =3D (void *)MTK_DP_INTF }, { .compatible =3D "mediatek,mt8192-dpi", .data =3D (void *)MTK_DPI }, { .compatible =3D "mediatek,mt8195-dp-intf", --=20 2.6.4