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Fri, 7 Oct 2022 02:51:17 -0700 From: Kartik To: , , , , , , , , , Subject: [PATCH 2/3] soc/tegra: fuse: add fuse nvmem keepout list Date: Fri, 7 Oct 2022 15:21:07 +0530 Message-ID: <1665136268-29494-3-git-send-email-kkartik@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1665136268-29494-1-git-send-email-kkartik@nvidia.com> References: <1665136268-29494-1-git-send-email-kkartik@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT080:EE_|IA1PR12MB6091:EE_ X-MS-Office365-Filtering-Correlation-Id: 800125be-d3c4-4590-1308-08daa84980ab X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: R81CXVUJD/xEKJ/bUdtTLBre2XSM3nzQJ/lqd6Ugh0qj75l4cbvm7rPh39bn371Y7Z8SCFA0xkSfx5jXxWt0JfSJfiMx1uhMtWyEWgPmwfMO84nCUIxcWBZ92hXxqOgRtSriY6U45FXw/o+m3rKFA/DCRaHn05CRp/6OgsPBOMqnyg1l4CM9BDDjMwlarB/nxIZKE+zZOU+FVuGgaXP3mpXVj/2nXCNJU7Bmn7DVfNevCEeOk0T5QO1PmIOgKtUC2KyaYLoVvSuM4rwAUaNTpYrsuMeiNxsOvFM+wipF4bWjO0oevvZOHFvXGI2v4tOGTgiIR5cimuUE/25eW+/eYTCg7MxeksTQVMq/oOTF5bJTkNIs1cCByjXzb2hRGaZprYKB7ZtZsGEyoP7nPQ1nnj2Cp8gzVnmb1nRSP7ltbqA/6rWqqnZxNCeXz2MPpvg60VHA7sW4W6dQiqauksmA28X//en89z7csgEoK8Kzd0b2ii4qjlKaUFMsnOGnF9S9VKIcRSJJ/qQCDu61BAah8JLCbh5TGOT1sJNUHfB5CwXBMbIAVRrXBLjm76p3/0LIb8VutgsPNMk9L/kPPhqVT8lnQsiKr55jmg82ALlYJZyqPmDvn0dRgCtUFAI6cxtK143jrCOeqgUBQSj9gSm/P+DBAtlYMLyA7fKVC95blC2vQy1FQPCFkXKBnktZ5tMFrUxSRlfWpa3zXqdiqbDUB6yiF/9saMUkCK/1R6lm8JZ/aF8IV8DVn9nwfv5m6Z1UGOnJ96m6On7TcM+6yKrOew2IpI9hsYH5fvBQ2igtb2uiZ8wzXyXdt0vUeZz6QNZw0LkfaNf2tbTWprG/ZmD2tA== X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230022)(4636009)(396003)(39860400002)(346002)(376002)(136003)(451199015)(40470700004)(36840700001)(46966006)(40460700003)(316002)(356005)(478600001)(8936002)(921005)(5660300002)(47076005)(40480700001)(426003)(336012)(86362001)(83380400001)(7696005)(82740400003)(2616005)(7636003)(36756003)(6666004)(41300700001)(2906002)(26005)(36860700001)(82310400005)(186003)(8676002)(70586007)(70206006)(110136005)(2101003)(83996005);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Oct 2022 09:51:26.9089 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 800125be-d3c4-4590-1308-08daa84980ab X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT080.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6091 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Tegra186 onwards, various fuse offsets are restricted and cannot be accessed from CCPLEX. Currently nvmem binary interface allows reading such offsets from userspace, which results in RAS errors. Add nvmem keepout lists to avoid any reads to restricted offsets. Signed-off-by: Kartik --- drivers/soc/tegra/fuse/fuse-tegra.c | 2 ++ drivers/soc/tegra/fuse/fuse-tegra30.c | 38 +++++++++++++++++++++++++++ drivers/soc/tegra/fuse/fuse.h | 2 ++ 3 files changed, 42 insertions(+) diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/f= use-tegra.c index cb97b59c2d89d..a68f36e1cab8f 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra.c +++ b/drivers/soc/tegra/fuse/fuse-tegra.c @@ -149,6 +149,8 @@ static int tegra_fuse_probe(struct platform_device *pde= v) nvmem.owner =3D THIS_MODULE; nvmem.cells =3D fuse->soc->cells; nvmem.ncells =3D fuse->soc->num_cells; + nvmem.keepout =3D fuse->soc->keepouts; + nvmem.nkeepout =3D fuse->soc->num_keepouts; nvmem.type =3D NVMEM_TYPE_OTP; nvmem.read_only =3D true; nvmem.root_only =3D true; diff --git a/drivers/soc/tegra/fuse/fuse-tegra30.c b/drivers/soc/tegra/fuse= /fuse-tegra30.c index 86547be567af0..932a03c64534a 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra30.c +++ b/drivers/soc/tegra/fuse/fuse-tegra30.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -494,6 +495,14 @@ static const struct nvmem_cell_lookup tegra186_fuse_lo= okups[] =3D { }, }; =20 +static const struct nvmem_keepout tegra186_fuse_keepouts[] =3D { + { .start =3D 0x01c, .end =3D 0x0f0 }, + { .start =3D 0x138, .end =3D 0x198 }, + { .start =3D 0x1d8, .end =3D 0x250 }, + { .start =3D 0x280, .end =3D 0x290 }, + { .start =3D 0x340, .end =3D 0x344 } +}; + static const struct tegra_fuse_info tegra186_fuse_info =3D { .read =3D tegra30_fuse_read, .size =3D 0x478, @@ -507,6 +516,8 @@ const struct tegra_fuse_soc tegra186_fuse_soc =3D { .num_lookups =3D ARRAY_SIZE(tegra186_fuse_lookups), .cells =3D tegra186_fuse_cells, .num_cells =3D ARRAY_SIZE(tegra186_fuse_cells), + .keepouts =3D tegra186_fuse_keepouts, + .num_keepouts =3D ARRAY_SIZE(tegra186_fuse_keepouts), .soc_attr_group =3D &tegra_soc_attr_group, .clk_suspend_on =3D false, }; @@ -576,6 +587,15 @@ static const struct nvmem_cell_lookup tegra194_fuse_lo= okups[] =3D { }, }; =20 +static const struct nvmem_keepout tegra194_fuse_keepouts[] =3D { + { .start =3D 0x01c, .end =3D 0x0b8 }, + { .start =3D 0x12c, .end =3D 0x198 }, + { .start =3D 0x1a0, .end =3D 0x1bc }, + { .start =3D 0x1d8, .end =3D 0x250 }, + { .start =3D 0x270, .end =3D 0x290 }, + { .start =3D 0x310, .end =3D 0x45c } +}; + static const struct tegra_fuse_info tegra194_fuse_info =3D { .read =3D tegra30_fuse_read, .size =3D 0x650, @@ -589,6 +609,8 @@ const struct tegra_fuse_soc tegra194_fuse_soc =3D { .num_lookups =3D ARRAY_SIZE(tegra194_fuse_lookups), .cells =3D tegra194_fuse_cells, .num_cells =3D ARRAY_SIZE(tegra194_fuse_cells), + .keepouts =3D tegra194_fuse_keepouts, + .num_keepouts =3D ARRAY_SIZE(tegra194_fuse_keepouts), .soc_attr_group =3D &tegra194_soc_attr_group, .clk_suspend_on =3D false, }; @@ -625,6 +647,20 @@ static const struct nvmem_cell_lookup tegra234_fuse_lo= okups[] =3D { }, }; =20 +static const struct nvmem_keepout tegra234_fuse_keepouts[] =3D { + { .start =3D 0x01c, .end =3D 0x0c8 }, + { .start =3D 0x12c, .end =3D 0x184 }, + { .start =3D 0x190, .end =3D 0x198 }, + { .start =3D 0x1a0, .end =3D 0x204 }, + { .start =3D 0x21c, .end =3D 0x250 }, + { .start =3D 0x25c, .end =3D 0x2f0 }, + { .start =3D 0x310, .end =3D 0x3d8 }, + { .start =3D 0x400, .end =3D 0x4f0 }, + { .start =3D 0x4f8, .end =3D 0x7e8 }, + { .start =3D 0x8d0, .end =3D 0x8d8 }, + { .start =3D 0xacc, .end =3D 0xf00 } +}; + static const struct tegra_fuse_info tegra234_fuse_info =3D { .read =3D tegra30_fuse_read, .size =3D 0x98c, @@ -638,6 +674,8 @@ const struct tegra_fuse_soc tegra234_fuse_soc =3D { .num_lookups =3D ARRAY_SIZE(tegra234_fuse_lookups), .cells =3D tegra234_fuse_cells, .num_cells =3D ARRAY_SIZE(tegra234_fuse_cells), + .keepouts =3D tegra234_fuse_keepouts, + .num_keepouts =3D ARRAY_SIZE(tegra234_fuse_keepouts), .soc_attr_group =3D &tegra194_soc_attr_group, .clk_suspend_on =3D false, }; diff --git a/drivers/soc/tegra/fuse/fuse.h b/drivers/soc/tegra/fuse/fuse.h index 02442157b231c..90f23be738947 100644 --- a/drivers/soc/tegra/fuse/fuse.h +++ b/drivers/soc/tegra/fuse/fuse.h @@ -34,6 +34,8 @@ struct tegra_fuse_soc { unsigned int num_lookups; const struct nvmem_cell_info *cells; unsigned int num_cells; + const struct nvmem_keepout *keepouts; + unsigned int num_keepouts; =20 const struct attribute_group *soc_attr_group; =20 --=20 2.17.1