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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by DM6NAM11FT097.mail.protection.outlook.com (10.13.172.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5676.17 via Frontend Transport; Tue, 27 Sep 2022 20:16:39 +0000 Received: from [127.0.1.1] (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.28; Tue, 27 Sep 2022 15:16:37 -0500 Subject: [PATCH v5 2/2] x86/resctrl: Remove arch_has_empty_bitmaps From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , Date: Tue, 27 Sep 2022 15:16:36 -0500 Message-ID: <166430979654.372014.615622285687642644.stgit@bmoger-ubuntu> In-Reply-To: <166430959655.372014.14294247239089851375.stgit@bmoger-ubuntu> References: <166430959655.372014.14294247239089851375.stgit@bmoger-ubuntu> User-Agent: StGit/1.1.dev103+g5369f4c MIME-Version: 1.0 Content-Type: text/plain; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Sep 2022 20:16:39.0182 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a14f7d43-3299-43f0-844f-08daa0c52f6e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT097.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6225 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The field arch_has_empty_bitmaps is not required anymore. The field min_cbm_bits is enough to validate the CBM (capacity bit mask) if the architecture can support the zero CBM or not. Suggested-by: Reinette Chatre Signed-off-by: Babu Moger Reviewed-by: Reinette Chatre Reviewed-by: Fenghua Yu --- arch/x86/kernel/cpu/resctrl/core.c | 2 -- arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 3 +-- include/linux/resctrl.h | 6 +++--- 3 files changed, 4 insertions(+), 7 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index a5c51a14fbce..c2657754672e 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -869,7 +869,6 @@ static __init void rdt_init_res_defs_intel(void) if (r->rid =3D=3D RDT_RESOURCE_L3 || r->rid =3D=3D RDT_RESOURCE_L2) { r->cache.arch_has_sparse_bitmaps =3D false; - r->cache.arch_has_empty_bitmaps =3D false; r->cache.arch_has_per_cpu_cfg =3D false; r->cache.min_cbm_bits =3D 1; } else if (r->rid =3D=3D RDT_RESOURCE_MBA) { @@ -890,7 +889,6 @@ static __init void rdt_init_res_defs_amd(void) if (r->rid =3D=3D RDT_RESOURCE_L3 || r->rid =3D=3D RDT_RESOURCE_L2) { r->cache.arch_has_sparse_bitmaps =3D true; - r->cache.arch_has_empty_bitmaps =3D true; r->cache.arch_has_per_cpu_cfg =3D true; r->cache.min_cbm_bits =3D 0; } else if (r->rid =3D=3D RDT_RESOURCE_MBA) { diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cp= u/resctrl/ctrlmondata.c index 87666275eed9..7f38c8bd8429 100644 --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c @@ -98,8 +98,7 @@ static bool cbm_validate(char *buf, u32 *data, struct rdt= _resource *r) return false; } =20 - if ((!r->cache.arch_has_empty_bitmaps && val =3D=3D 0) || - val > r->default_ctrl) { + if ((r->cache.min_cbm_bits > 0 && val =3D=3D 0) || val > r->default_ctrl)= { rdt_last_cmd_puts("Mask out of range\n"); return false; } diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index 21deb5212bbd..46ed8589857c 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -72,11 +72,12 @@ struct rdt_domain { /** * struct resctrl_cache - Cache allocation related data * @cbm_len: Length of the cache bit mask - * @min_cbm_bits: Minimum number of consecutive bits to be set + * @min_cbm_bits: Minimum number of consecutive bits to be set. + * The value 0 means the architecture can support + * zero CBM. * @shareable_bits: Bitmask of shareable resource with other * executing entities * @arch_has_sparse_bitmaps: True if a bitmap like f00f is valid. - * @arch_has_empty_bitmaps: True if the '0' bitmap is valid. * @arch_has_per_cpu_cfg: True if QOS_CFG register for this cache * level has CPU scope. */ @@ -85,7 +86,6 @@ struct resctrl_cache { unsigned int min_cbm_bits; unsigned int shareable_bits; bool arch_has_sparse_bitmaps; - bool arch_has_empty_bitmaps; bool arch_has_per_cpu_cfg; }; =20