From nobody Fri Mar 29 12:45:36 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2260ECAAD8 for ; Fri, 23 Sep 2022 13:06:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231808AbiIWNG5 (ORCPT ); Fri, 23 Sep 2022 09:06:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58094 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231719AbiIWNGt (ORCPT ); Fri, 23 Sep 2022 09:06:49 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BAC6313A38E; Fri, 23 Sep 2022 06:06:48 -0700 (PDT) Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28NCwrjF030314; Fri, 23 Sep 2022 13:06:06 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=6O7UySE4kFRKgq5vI5ybo6BrU33JJN34iQbugYUnpv0=; b=hb/2x5Qp56HkcKTPx5ajBavJIFAF4/sAofSY/lQq3AhYMUQ6Kz4PRDjPg7KhVFZTuH1r +vPUUkDfRRK9wzpwU0CrmwAxeVXnMO/AI55llcCsLBajfIOeeb+DsHN4jkktJtstsDN+ do1hMi6AUdJ6KKdic9v1+gwQCHlTcw1iixGxZsPCj1G7+pTXLmVuAs3vw2mD5ldXUID4 j9HMIzWZb6qzZEf+Ct0oKzvhmOrVJ92qJPMXLwCV1Ac+ZA5g97en87pZ3VOSTSIPuKRf uXA/emKQI/LB8ZQbn3v5/5dJVuNHrN3PA7rLuAXysdT0MSYhBp6DZXZTp2qpgLRp/M/a Nw== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jsbmxrg38-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 23 Sep 2022 13:06:06 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 28ND65Rp017852 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 23 Sep 2022 13:06:05 GMT Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Fri, 23 Sep 2022 06:06:00 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , , , , , , , , CC: Srinivasa Rao Mandadapu Subject: [PATCH v8 1/7] dt-bindings: remoteproc: qcom: Add SC7280 ADSP support Date: Fri, 23 Sep 2022 18:35:34 +0530 Message-ID: <1663938340-24345-2-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1663938340-24345-1-git-send-email-quic_srivasam@quicinc.com> References: <1663938340-24345-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: PC3j_LsLZrd_e1HSoWZTY8wSGnRVN-JD X-Proofpoint-ORIG-GUID: PC3j_LsLZrd_e1HSoWZTY8wSGnRVN-JD X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-23_04,2022-09-22_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 adultscore=0 priorityscore=1501 malwarescore=0 lowpriorityscore=0 suspectscore=0 clxscore=1015 phishscore=0 spamscore=0 mlxlogscore=999 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2209230085 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add ADSP PIL loading support for SC7280 SoCs. Signed-off-by: Srinivasa Rao Mandadapu Reviewed-by: Rob Herring Reviewed-by: Stephen Boyd --- Changes since V7: -- Remove redundant clocks in dt bindings. -- Fix dt compilation error in dt bindings. Changes since V6: -- Update glink-edge property. -- Add qcom,qmp property. Changes since V5: -- Remove qcom,adsp-memory-regions property. Changes since V4: -- Update halt registers description in dt bindings. .../bindings/remoteproc/qcom,sc7280-adsp-pil.yaml | 207 +++++++++++++++++= ++++ 1 file changed, 207 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sc728= 0-adsp-pil.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-= pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pi= l.yaml new file mode 100644 index 0000000..79ef3c0 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml @@ -0,0 +1,207 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-adsp-pil.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SC7280 ADSP Peripheral Image Loader + +maintainers: + - Srinivasa Rao Mandadapu + +description: + This document describes the hardware for a component that loads and boot= s firmware + on the Qualcomm Technology Inc. ADSP. + +properties: + compatible: + enum: + - qcom,sc7280-adsp-pil + + reg: + minItems: 1 + items: + - description: qdsp6ss register + - description: efuse q6ss register + + interrupts: + items: + - description: Watchdog interrupt + - description: Fatal interrupt + - description: Ready interrupt + - description: Handover interrupt + - description: Stop acknowledge interrupt + - description: Shutdown acknowledge interrupt + + interrupt-names: + items: + - const: wdog + - const: fatal + - const: ready + - const: handover + - const: stop-ack + - const: shutdown-ack + + clocks: + items: + - description: XO clock + - description: GCC CFG NOC LPASS clock + + clock-names: + items: + - const: xo + - const: gcc_cfg_noc_lpass + + power-domains: + items: + - description: LCX power domain + + resets: + items: + - description: PDC AUDIO SYNC RESET + - description: CC LPASS restart + + reset-names: + items: + - const: pdc_sync + - const: cc_lpass + + memory-region: + maxItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + qcom,halt-regs: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Phandle reference to a syscon representing TCSR followed by the + four offsets within syscon for q6, CE, AXI and qv6 halt registers. + items: + items: + - description: phandle to TCSR MUTEX + - description: offset to q6 halt registers + - description: offset to CE halt registers + - description: offset to AXI halt registers + - description: offset to qv6 halt registers + + qcom,smem-states: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: States used by the AP to signal the Hexagon core + items: + - description: Stop the modem + + qcom,smem-state-names: + description: The names of the state bits used for SMP2P output + const: stop + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + glink-edge: + type: object + description: | + Qualcomm G-Link subnode which represents communication edge, channels + and devices related to the ADSP. + + properties: + interrupts: + items: + - description: IRQ from ADSP to GLINK + + mboxes: + items: + - description: Mailbox for communication between APPS and ADSP + + label: + description: The names of the state bits used for SMP2P output + items: + - const: lpass + + qcom,remote-pid: + $ref: /schemas/types.yaml#/definitions/uint32 + description: ID of the shared memory used by GLINK for communicati= on with ADSP + + gpr: true + apr: false + fastrpc: false + + required: + - interrupts + - mboxes + - label + - qcom,remote-pid + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - power-domains + - resets + - reset-names + - qcom,halt-regs + - memory-region + - qcom,smem-states + - qcom,smem-state-names + - qcom,qmp + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + #include + #include + #include + #include + + remoteproc@3000000 { + compatible =3D "qcom,sc7280-adsp-pil"; + reg =3D <0x03000000 0x5000>, + <0x0355b000 0x10>; + + interrupts-extended =3D <&pdc 162 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; + + interrupt-names =3D "wdog", "fatal", "ready", + "handover", "stop-ack", "shutdown-ack"; + + clocks =3D <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_CFG_NOC_LPASS_CLK>; + clock-names =3D "xo", "gcc_cfg_noc_lpass"; + + power-domains =3D <&rpmhpd SC7280_LCX>; + + resets =3D <&pdc_reset PDC_AUDIO_SYNC_RESET>, + <&aoss_reset AOSS_CC_LPASS_RESTART>; + reset-names =3D "pdc_sync", "cc_lpass"; + + qcom,halt-regs =3D <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>; + + memory-region =3D <&adsp_mem>; + + qcom,smem-states =3D <&adsp_smp2p_out 0>; + qcom,smem-state-names =3D "stop"; + + qcom,qmp =3D <&aoss_qmp>; + + glink-edge { + interrupts-extended =3D <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes =3D <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label =3D "lpass"; + qcom,remote-pid =3D <2>; + }; + }; --=20 2.7.4 From nobody Fri Mar 29 12:45:36 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29893ECAAD8 for ; Fri, 23 Sep 2022 13:12:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232187AbiIWNMQ (ORCPT ); Fri, 23 Sep 2022 09:12:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37356 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231402AbiIWNL4 (ORCPT ); Fri, 23 Sep 2022 09:11:56 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 55CC4AB060; Fri, 23 Sep 2022 06:11:55 -0700 (PDT) Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28NCrcZu005589; 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charset="utf-8" Add flag in qcom_adsp private data structure and initialize it to distinguish ADSP modules, which has iommu requirement, for using iommu selectively. Signed-off-by: Srinivasa Rao Mandadapu Reviewed-by: Stephen Boyd Reviewed-by: Sibi Sankar --- Changes since V6: -- Update commit message. Changes since V5: -- Rename adsp_sandbox_needed to has_iommu. Changes since V3: -- Rename is_adsp_sb_needed to adsp_sandbox_needed. Changes since V2: -- Add is_adsp_sb_needed flag instead of is_wpss. drivers/remoteproc/qcom_q6v5_adsp.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_= q6v5_adsp.c index 2f3b9f5..fa2ccac 100644 --- a/drivers/remoteproc/qcom_q6v5_adsp.c +++ b/drivers/remoteproc/qcom_q6v5_adsp.c @@ -62,6 +62,7 @@ struct adsp_pil_data { const char *sysmon_name; int ssctl_id; bool is_wpss; + bool has_iommu; bool auto_boot; =20 const char **clk_ids; @@ -99,6 +100,7 @@ struct qcom_adsp { phys_addr_t mem_reloc; void *mem_region; size_t mem_size; + bool has_iommu; =20 struct device *proxy_pds[QCOM_Q6V5_RPROC_PROXY_PD_MAX]; size_t proxy_pd_count; @@ -596,12 +598,15 @@ static int adsp_probe(struct platform_device *pdev) } =20 rproc->auto_boot =3D desc->auto_boot; + rproc->has_iommu =3D desc->has_iommu; rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE); =20 adsp =3D (struct qcom_adsp *)rproc->priv; adsp->dev =3D &pdev->dev; adsp->rproc =3D rproc; adsp->info_name =3D desc->sysmon_name; + adsp->has_iommu =3D desc->has_iommu; + platform_set_drvdata(pdev, adsp); =20 if (desc->is_wpss) --=20 2.7.4 From nobody Fri Mar 29 12:45:36 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDE16C6FA8B for ; Fri, 23 Sep 2022 13:07:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231719AbiIWNHS (ORCPT ); Fri, 23 Sep 2022 09:07:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58424 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231949AbiIWNHG (ORCPT ); Fri, 23 Sep 2022 09:07:06 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D804113AF28; Fri, 23 Sep 2022 06:06:59 -0700 (PDT) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28NCOcl8032003; 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charset="utf-8" Update adsp pil data and compatible name for loading ADSP binary on SC7280 based platforms. Signed-off-by: Srinivasa Rao Mandadapu Reviewed-by: Stephen Boyd --- Changes since V5: -- Rename adsp_sandbox_needed to has_iommu. -- Change adsp binary extension name. Changes since V3: -- Rename is_adsp_sb_needed to adsp_sandbox_needed. -- Update sc7280 compatible name entry in sorted order. Changes since V2: -- Initialize is_adsp_sb_needed flag. -- Remove empty proxy pds array. drivers/remoteproc/qcom_q6v5_adsp.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_= q6v5_adsp.c index fa2ccac..02d17b4 100644 --- a/drivers/remoteproc/qcom_q6v5_adsp.c +++ b/drivers/remoteproc/qcom_q6v5_adsp.c @@ -702,6 +702,21 @@ static const struct adsp_pil_data adsp_resource_init = =3D { }, }; =20 +static const struct adsp_pil_data adsp_sc7280_resource_init =3D { + .crash_reason_smem =3D 423, + .firmware_name =3D "adsp.pbn", + .load_state =3D "adsp", + .ssr_name =3D "lpass", + .sysmon_name =3D "adsp", + .ssctl_id =3D 0x14, + .has_iommu =3D true, + .auto_boot =3D true, + .clk_ids =3D (const char*[]) { + "gcc_cfg_noc_lpass", NULL + }, + .num_clks =3D 1, +}; + static const struct adsp_pil_data cdsp_resource_init =3D { .crash_reason_smem =3D 601, .firmware_name =3D "cdsp.mdt", @@ -740,6 +755,7 @@ static const struct adsp_pil_data wpss_resource_init = =3D { =20 static const struct of_device_id adsp_of_match[] =3D { { .compatible =3D "qcom,qcs404-cdsp-pil", .data =3D &cdsp_resource_init }, + { .compatible =3D "qcom,sc7280-adsp-pil", .data =3D &adsp_sc7280_resource= _init }, { .compatible =3D "qcom,sc7280-wpss-pil", .data =3D &wpss_resource_init }, { .compatible =3D "qcom,sdm845-adsp-pil", .data =3D &adsp_resource_init }, { }, --=20 2.7.4 From nobody Fri Mar 29 12:45:36 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99C7BC6FA8B for ; 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charset="utf-8" Change parse_fw callback in rproc ops from qcom_register_dump_segments to local function such that, it can perform coredump segments registration and it can parse section header in memory sandboxing required platforms. Signed-off-by: Srinivasa Rao Mandadapu --- Changes since V6: -- Update parse firmware callback. drivers/remoteproc/qcom_q6v5_adsp.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_= q6v5_adsp.c index 02d17b4..9ea10b7 100644 --- a/drivers/remoteproc/qcom_q6v5_adsp.c +++ b/drivers/remoteproc/qcom_q6v5_adsp.c @@ -440,6 +440,27 @@ static void *adsp_da_to_va(struct rproc *rproc, u64 da= , size_t len, bool *is_iom return adsp->mem_region + offset; } =20 +static int adsp_parse_firmware(struct rproc *rproc, const struct firmware = *fw) +{ + struct qcom_adsp *adsp =3D rproc->priv; + int ret; + + ret =3D qcom_register_dump_segments(rproc, fw); + if (ret) { + dev_err(&rproc->dev, "Error in registering dump segments\n"); + return ret; + } + + if (adsp->has_iommu) { + ret =3D rproc_elf_load_rsc_table(rproc, fw); + if (ret) { + dev_err(&rproc->dev, "Error in loading resource table\n"); + return ret; + } + } + return 0; +} + static unsigned long adsp_panic(struct rproc *rproc) { struct qcom_adsp *adsp =3D rproc->priv; @@ -451,7 +472,7 @@ static const struct rproc_ops adsp_ops =3D { .start =3D adsp_start, .stop =3D adsp_stop, .da_to_va =3D adsp_da_to_va, - .parse_fw =3D qcom_register_dump_segments, + .parse_fw =3D adsp_parse_firmware, .load =3D adsp_load, .panic =3D adsp_panic, }; --=20 2.7.4 From nobody Fri Mar 29 12:45:36 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16B6EECAAD8 for ; Fri, 23 Sep 2022 13:07:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232213AbiIWNH3 (ORCPT ); Fri, 23 Sep 2022 09:07:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58492 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231965AbiIWNHN (ORCPT ); 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charset="utf-8" Replace hard coded values of QDSP6 boot control reg params with appropriate macro names. Signed-off-by: Srinivasa Rao Mandadapu Reviewed-by: Dmitry Baryshkov Reviewed-by: Stephen Boyd Reviewed-by: Sibi Sankar --- drivers/remoteproc/qcom_q6v5_adsp.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_= q6v5_adsp.c index 9ea10b7..80c8169 100644 --- a/drivers/remoteproc/qcom_q6v5_adsp.c +++ b/drivers/remoteproc/qcom_q6v5_adsp.c @@ -54,6 +54,9 @@ =20 #define QCOM_Q6V5_RPROC_PROXY_PD_MAX 3 =20 +#define LPASS_BOOT_CORE_START BIT(0) +#define LPASS_BOOT_CMD_START BIT(0) + struct adsp_pil_data { int crash_reason_smem; const char *firmware_name; @@ -366,10 +369,10 @@ static int adsp_start(struct rproc *rproc) writel(adsp->mem_phys >> 4, adsp->qdsp6ss_base + RST_EVB_REG); =20 /* De-assert QDSP6 stop core. QDSP6 will execute after out of reset */ - writel(0x1, adsp->qdsp6ss_base + CORE_START_REG); + writel(LPASS_BOOT_CORE_START, adsp->qdsp6ss_base + CORE_START_REG); =20 /* Trigger boot FSM to start QDSP6 */ - writel(0x1, adsp->qdsp6ss_base + BOOT_CMD_REG); + writel(LPASS_BOOT_CMD_START, adsp->qdsp6ss_base + BOOT_CMD_REG); =20 /* Wait for core to come out of reset */ ret =3D readl_poll_timeout(adsp->qdsp6ss_base + BOOT_STATUS_REG, --=20 2.7.4 From nobody Fri Mar 29 12:45:36 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B124DC6FA82 for ; Fri, 23 Sep 2022 13:07:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232270AbiIWNHf (ORCPT ); Fri, 23 Sep 2022 09:07:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58686 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232142AbiIWNHQ (ORCPT ); Fri, 23 Sep 2022 09:07:16 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F1FF713AF2A; Fri, 23 Sep 2022 06:07:15 -0700 (PDT) Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28NB6n7u024877; Fri, 23 Sep 2022 13:06:35 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=P3ipnGQPJBSwIuatx0lgGwk2Nb3vQGzmYftoKwSjTkA=; b=jCTiq1rsP2oEgyWwHliBZnwRLZUJdlT6chcQNc5gc0DRXJz5MG0aQ8LKcv/tleyns3vw DZoifr4MpwlCJmWB7pBPON8Mdy4gFWFDVinYRT3TpMMRcx/aGAsr3xlmcG5UVnvRgagk WDxMqzuGo6xakdET4mDpbXkwjSi17BtmDKM/LVqaEdNuao53znOi8ny37RIBBJF7FIkb +uVHcYasOW+AZdv9IggL3SMF6USt3jiXVhAr78XKhJf5+zuyjoyZa19k8P5pNwH31Ii3 hbDtluQ79Z4fwOSFJG31EXfpeGWAH8Ofc7HRWn9gnONU57QkKWdlyaHPdbA5fH9rWYKP oQ== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jsbmxrg5j-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 23 Sep 2022 13:06:35 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 28ND6YLT028272 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 23 Sep 2022 13:06:35 GMT Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Fri, 23 Sep 2022 06:06:29 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , , , , , , , , CC: Srinivasa Rao Mandadapu Subject: [PATCH v8 6/7] remoteproc: qcom: Add efuse evb selection control Date: Fri, 23 Sep 2022 18:35:39 +0530 Message-ID: <1663938340-24345-7-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1663938340-24345-1-git-send-email-quic_srivasam@quicinc.com> References: <1663938340-24345-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 171KJvTt9-9WDTqCJD5SdaP2Go6XdtZY X-Proofpoint-ORIG-GUID: 171KJvTt9-9WDTqCJD5SdaP2Go6XdtZY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-23_04,2022-09-22_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 adultscore=0 priorityscore=1501 malwarescore=0 lowpriorityscore=0 suspectscore=0 clxscore=1015 phishscore=0 spamscore=0 mlxlogscore=995 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2209230085 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add efuse evb selection control and enable it for starting ADSP. Signed-off-by: Srinivasa Rao Mandadapu Reviewed-by: Stephen Boyd Reviewed-by: Sibi Sankar --- Changes since V5: -- Split devm_platform_ioremap_resource_byname function. drivers/remoteproc/qcom_q6v5_adsp.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_= q6v5_adsp.c index 80c8169..e463fbc 100644 --- a/drivers/remoteproc/qcom_q6v5_adsp.c +++ b/drivers/remoteproc/qcom_q6v5_adsp.c @@ -56,6 +56,7 @@ =20 #define LPASS_BOOT_CORE_START BIT(0) #define LPASS_BOOT_CMD_START BIT(0) +#define LPASS_EFUSE_Q6SS_EVB_SEL 0x0 =20 struct adsp_pil_data { int crash_reason_smem; @@ -86,6 +87,7 @@ struct qcom_adsp { struct clk_bulk_data *clks; =20 void __iomem *qdsp6ss_base; + void __iomem *lpass_efuse; =20 struct reset_control *pdc_sync_reset; struct reset_control *restart; @@ -368,6 +370,9 @@ static int adsp_start(struct rproc *rproc) /* Program boot address */ writel(adsp->mem_phys >> 4, adsp->qdsp6ss_base + RST_EVB_REG); =20 + if (adsp->lpass_efuse) + writel(LPASS_EFUSE_Q6SS_EVB_SEL, adsp->lpass_efuse); + /* De-assert QDSP6 stop core. QDSP6 will execute after out of reset */ writel(LPASS_BOOT_CORE_START, adsp->qdsp6ss_base + CORE_START_REG); =20 @@ -534,6 +539,7 @@ static int adsp_init_reset(struct qcom_adsp *adsp) static int adsp_init_mmio(struct qcom_adsp *adsp, struct platform_device *pdev) { + struct resource *efuse_region; struct device_node *syscon; int ret; =20 @@ -543,6 +549,17 @@ static int adsp_init_mmio(struct qcom_adsp *adsp, return PTR_ERR(adsp->qdsp6ss_base); } =20 + efuse_region =3D platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (!efuse_region) { + adsp->lpass_efuse =3D NULL; + dev_dbg(adsp->dev, "failed to get efuse memory region\n"); + } else { + adsp->lpass_efuse =3D devm_ioremap_resource(&pdev->dev, efuse_region); + if (IS_ERR(adsp->lpass_efuse)) { + dev_err(adsp->dev, "failed to map efuse registers\n"); + return PTR_ERR(adsp->lpass_efuse); + } + } syscon =3D of_parse_phandle(pdev->dev.of_node, "qcom,halt-regs", 0); if (!syscon) { dev_err(&pdev->dev, "failed to parse qcom,halt-regs\n"); --=20 2.7.4 From nobody Fri Mar 29 12:45:36 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F4142C6FA82 for ; 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Fri, 23 Sep 2022 13:06:41 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 28ND6e16018478 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 23 Sep 2022 13:06:40 GMT Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Fri, 23 Sep 2022 06:06:35 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , , , , , , , , CC: Srinivasa Rao Mandadapu Subject: [PATCH v8 7/7] remoteproc: qcom: Add support for memory sandbox Date: Fri, 23 Sep 2022 18:35:40 +0530 Message-ID: <1663938340-24345-8-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1663938340-24345-1-git-send-email-quic_srivasam@quicinc.com> References: <1663938340-24345-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: ZeHd-5lPbccMqPHsi-KEwZ2cnqmRZp6N X-Proofpoint-ORIG-GUID: ZeHd-5lPbccMqPHsi-KEwZ2cnqmRZp6N X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-23_04,2022-09-22_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 adultscore=0 priorityscore=1501 malwarescore=0 lowpriorityscore=0 suspectscore=0 clxscore=1015 phishscore=0 spamscore=0 mlxlogscore=999 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2209230085 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update pil driver with SMMU mapping for allowing authorised memory access to ADSP firmware, by carveout reserved adsp memory region from device tree file. Signed-off-by: Srinivasa Rao Mandadapu --- Changes since V6: -- Update smmu map and unmap function names. -- Revert adsp_ops const change. -- Move iommu check to within smmu map/unmap functions. Changes since V5: -- Remove adsp_rproc_unmap_smmu, adsp_of_unmap_smmu, adsp_of_map_smmu and=20 adsp_rproc_map_smmu functions. -- Remove find_loaded_rsc_table call back initialization. -- Rename adsp_sandbox_needed to has_iommu. Changes since V4: -- Split the code and add appropriate APIs for resource allocation and fre= e. -- Update adsp_unmap_smmu with missing free ops call. -- Update normalizing length value in adsp_of_unmap_smmu. Changes since V3: -- Rename is_adsp_sb_needed to adsp_sandbox_needed. -- Add smmu unmapping in error case and in adsp stop. Changes since V2: -- Replace platform_bus_type with adsp->dev->bus. -- Use API of_parse_phandle_with_args() instead of of_parse_phandle_with_f= ixed_args(). -- Replace adsp->is_wpss with adsp->is_adsp. -- Update error handling in adsp_start(). drivers/remoteproc/qcom_q6v5_adsp.c | 56 +++++++++++++++++++++++++++++++++= +++- 1 file changed, 55 insertions(+), 1 deletion(-) diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_= q6v5_adsp.c index e463fbc..d89f3fa 100644 --- a/drivers/remoteproc/qcom_q6v5_adsp.c +++ b/drivers/remoteproc/qcom_q6v5_adsp.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -48,6 +49,8 @@ #define LPASS_PWR_ON_REG 0x10 #define LPASS_HALTREQ_REG 0x0 =20 +#define SID_MASK_DEFAULT 0xF + #define QDSP6SS_XO_CBCR 0x38 #define QDSP6SS_CORE_CBCR 0x20 #define QDSP6SS_SLEEP_CBCR 0x3c @@ -333,6 +336,47 @@ static int adsp_load(struct rproc *rproc, const struct= firmware *fw) return 0; } =20 +static void adsp_unmap_carveout(struct rproc *rproc) +{ + struct qcom_adsp *adsp =3D rproc->priv; + + if (adsp->has_iommu) + iommu_unmap(rproc->domain, adsp->mem_phys, adsp->mem_size); +} + +static int adsp_map_carveout(struct rproc *rproc) +{ + struct qcom_adsp *adsp =3D rproc->priv; + struct of_phandle_args args; + long long sid; + unsigned long iova; + int ret; + + if (!adsp->has_iommu) + return 0; + + if (!rproc->domain) + return -EINVAL; + + ret =3D of_parse_phandle_with_args(adsp->dev->of_node, "iommus", "#iommu-= cells", 0, &args); + if (ret < 0) + return ret; + + sid =3D args.args[0] & SID_MASK_DEFAULT; + + /* Add SID configuration for ADSP Firmware to SMMU */ + iova =3D adsp->mem_phys | (sid << 32); + + ret =3D iommu_map(rproc->domain, iova, adsp->mem_phys, + adsp->mem_size, IOMMU_READ | IOMMU_WRITE); + if (ret) { + dev_err(adsp->dev, "Unable to map ADSP Physical Memory\n"); + return ret; + } + + return 0; +} + static int adsp_start(struct rproc *rproc) { struct qcom_adsp *adsp =3D (struct qcom_adsp *)rproc->priv; @@ -343,9 +387,15 @@ static int adsp_start(struct rproc *rproc) if (ret) return ret; =20 + ret =3D adsp_map_carveout(rproc); + if (ret) { + dev_err(adsp->dev, "ADSP smmu mapping failed\n"); + goto disable_irqs; + } + ret =3D clk_prepare_enable(adsp->xo); if (ret) - goto disable_irqs; + goto adsp_smmu_unmap; =20 ret =3D qcom_rproc_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); @@ -401,6 +451,8 @@ static int adsp_start(struct rproc *rproc) qcom_rproc_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); disable_xo_clk: clk_disable_unprepare(adsp->xo); +adsp_smmu_unmap: + adsp_unmap_carveout(rproc); disable_irqs: qcom_q6v5_unprepare(&adsp->q6v5); =20 @@ -429,6 +481,8 @@ static int adsp_stop(struct rproc *rproc) if (ret) dev_err(adsp->dev, "failed to shutdown: %d\n", ret); =20 + adsp_unmap_carveout(rproc); + handover =3D qcom_q6v5_unprepare(&adsp->q6v5); if (handover) qcom_adsp_pil_handover(&adsp->q6v5); --=20 2.7.4