From nobody Mon Apr 6 15:40:01 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33C88C38145 for ; Tue, 6 Sep 2022 09:42:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239341AbiIFJl6 (ORCPT ); Tue, 6 Sep 2022 05:41:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57934 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238726AbiIFJlh (ORCPT ); Tue, 6 Sep 2022 05:41:37 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 95804753BF; Tue, 6 Sep 2022 02:41:36 -0700 (PDT) Date: Tue, 06 Sep 2022 09:41:33 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1662457294; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jqvlJ33wBfmd0wCdx8OKf+IHaKkLmft9PZ+7Vfolfvk=; b=KxX290Hg6mV1JscoK3S3TIavZO1n8YKkrPxiVVjj86xDtRobg6V6W5DCXZuAGOyeVo46en KMb1FOcCfOo0brYNS7SKxdKTg+cT2l4cU+pK3oyXx/i9fVX3421LtpzdOCstJuLhHiRvcQ VVcKwXnDyXnLPXRoxdrNAIkA3yXHZHrndI6Gp4STrHPDbmLAPpATKm9xq8s9Qt8pXiFF5Z nrLDiqlLA0YI14mBz9yXVfGN/B753uJptMlBbME9KfJYz+uSBmquxpQDuA6/aVlhSnpCnA 37unwHUyn9mA9AbqaH5T4ZmbftA6+jX2O629UC2j8NqXFwP7BvX7pXlRc531pQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1662457294; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jqvlJ33wBfmd0wCdx8OKf+IHaKkLmft9PZ+7Vfolfvk=; b=9/9Zr6LLcAppA6UDuBR3TctokhAgi4+aIDI1iRvNCLd7IWKg/kbyG8v33FLCR1+r0di7PT aOdZMXQF8xXMDhCw== From: "tip-bot2 for Kan Liang" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: perf/core] perf/x86/intel/pebs: Fix PEBS timestamps overwritten Cc: Andreas Kogler , Stephane Eranian , Kan Liang , "Peter Zijlstra (Intel)" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20220901130959.1285717-3-kan.liang@linux.intel.com> References: <20220901130959.1285717-3-kan.liang@linux.intel.com> MIME-Version: 1.0 Message-ID: <166245729337.401.1370931544780957482.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the perf/core branch of tip: Commit-ID: 47a3aeb39e8dc099ae431cd8b46bdf218f5511b2 Gitweb: https://git.kernel.org/tip/47a3aeb39e8dc099ae431cd8b46bdf218= f5511b2 Author: Kan Liang AuthorDate: Thu, 01 Sep 2022 06:09:55 -07:00 Committer: Peter Zijlstra CommitterDate: Tue, 06 Sep 2022 11:33:01 +02:00 perf/x86/intel/pebs: Fix PEBS timestamps overwritten The PEBS TSC-based timestamps do not appear correctly in the final perf.data output file from perf record. The data->time field setup by PEBS in the setup_pebs_fixed_sample_data() is later overwritten by perf_events generic code in perf_prepare_sample(). There is an ordering problem. Set the sample flags when the data->time is updated by PEBS. The data->time field will not be overwritten anymore. Reported-by: Andreas Kogler Reported-by: Stephane Eranian Signed-off-by: Kan Liang Signed-off-by: Peter Zijlstra (Intel) Link: https://lore.kernel.org/r/20220901130959.1285717-3-kan.liang@linux.in= tel.com --- arch/x86/events/intel/ds.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c index ba60427..cdd857b 100644 --- a/arch/x86/events/intel/ds.c +++ b/arch/x86/events/intel/ds.c @@ -1635,8 +1635,10 @@ static void setup_pebs_fixed_sample_data(struct perf= _event *event, * We can only do this for the default trace clock. */ if (x86_pmu.intel_cap.pebs_format >=3D 3 && - event->attr.use_clockid =3D=3D 0) + event->attr.use_clockid =3D=3D 0) { data->time =3D native_sched_clock_from_tsc(pebs->tsc); + data->sample_flags |=3D PERF_SAMPLE_TIME; + } =20 if (has_branch_stack(event)) data->br_stack =3D &cpuc->lbr_stack; @@ -1697,8 +1699,10 @@ static void setup_pebs_adaptive_sample_data(struct p= erf_event *event, perf_sample_data_init(data, 0, event->hw.last_period); data->period =3D event->hw.last_period; =20 - if (event->attr.use_clockid =3D=3D 0) + if (event->attr.use_clockid =3D=3D 0) { data->time =3D native_sched_clock_from_tsc(basic->tsc); + data->sample_flags |=3D PERF_SAMPLE_TIME; + } =20 /* * We must however always use iregs for the unwinder to stay sane; the