From nobody Mon Apr 6 15:40:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4130C38145 for ; Tue, 6 Sep 2022 09:41:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238669AbiIFJls (ORCPT ); Tue, 6 Sep 2022 05:41:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238987AbiIFJlf (ORCPT ); Tue, 6 Sep 2022 05:41:35 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D1332754A3; Tue, 6 Sep 2022 02:41:33 -0700 (PDT) Date: Tue, 06 Sep 2022 09:41:31 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1662457292; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0Gl3zcThSXEHpQBvPhLpT1lJeXvGRMytsmX5MUkgI6k=; b=WNPZzMuS8V7MEuTp8T016Dk8+O2sEXSCztoqlVDebvWyaJzXNsEDv/hMOU3yH0DKGtXrEh Vbj5Du0aTG0PEwBkitoclpOyt8SRHo7yZZxQ+rjuMHiSiPkFZtTgwbv02+fgWCpW479TSZ NLlS8t8sWvp3qrg3y9NMgPUlzSue0GnGJax/J9m5VtzI8taPdz2oaac2TSFsPi3SUij2RO 7yKir+vZPg5LRJnowE+/AoamX35nJlDXP5cMDoTTCfDU1GsTOuc4uQ+lKDoSLEycjtM5Lc 3uV/A4f5qywC7Gb5eP+9XBn9XqHaRmRikAYgp8+ipq5Ot6LjCF9Rb4Tl+QjATg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1662457292; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0Gl3zcThSXEHpQBvPhLpT1lJeXvGRMytsmX5MUkgI6k=; b=aXbrnd+rHPnlaAZIZw/1XeUDCLZhEOhBX9fV7/GqhzRadbu5EkdIHEl+uBrtevoLGHCCnw d3lQpVFX5rw/GcAg== From: "tip-bot2 for Kan Liang" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: perf/core] perf: Use sample_flags for weight Cc: Kan Liang , "Peter Zijlstra (Intel)" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20220901130959.1285717-5-kan.liang@linux.intel.com> References: <20220901130959.1285717-5-kan.liang@linux.intel.com> MIME-Version: 1.0 Message-ID: <166245729123.401.13200182862800639132.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the perf/core branch of tip: Commit-ID: 2abe681da0a192ab850a5271d838a7817b469fca Gitweb: https://git.kernel.org/tip/2abe681da0a192ab850a5271d838a7817= b469fca Author: Kan Liang AuthorDate: Thu, 01 Sep 2022 06:09:57 -07:00 Committer: Peter Zijlstra CommitterDate: Tue, 06 Sep 2022 11:33:02 +02:00 perf: Use sample_flags for weight Use the new sample_flags to indicate whether the weight field is filled by the PMU driver. Remove the weight field from the perf_sample_data_init() to minimize the number of cache lines touched. Signed-off-by: Kan Liang Signed-off-by: Peter Zijlstra (Intel) Link: https://lore.kernel.org/r/20220901130959.1285717-5-kan.liang@linux.in= tel.com --- arch/powerpc/perf/core-book3s.c | 5 +++-- arch/x86/events/intel/ds.c | 10 +++++++--- include/linux/perf_event.h | 3 +-- kernel/events/core.c | 3 +++ 4 files changed, 14 insertions(+), 7 deletions(-) diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3= s.c index 1ad1efd..a5c95a2 100644 --- a/arch/powerpc/perf/core-book3s.c +++ b/arch/powerpc/perf/core-book3s.c @@ -2305,9 +2305,10 @@ static void record_and_restart(struct perf_event *ev= ent, unsigned long val, ppmu->get_mem_data_src(&data.data_src, ppmu->flags, regs); =20 if (event->attr.sample_type & PERF_SAMPLE_WEIGHT_TYPE && - ppmu->get_mem_weight) + ppmu->get_mem_weight) { ppmu->get_mem_weight(&data.weight.full, event->attr.sample_type); - + data.sample_flags |=3D PERF_SAMPLE_WEIGHT_TYPE; + } if (perf_event_overflow(event, &data, regs)) power_pmu_stop(event, 0); } else if (period) { diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c index 0489f75..4c51118 100644 --- a/arch/x86/events/intel/ds.c +++ b/arch/x86/events/intel/ds.c @@ -1527,8 +1527,10 @@ static void setup_pebs_fixed_sample_data(struct perf= _event *event, /* * Use latency for weight (only avail with PEBS-LL) */ - if (fll && (sample_type & PERF_SAMPLE_WEIGHT_TYPE)) + if (fll && (sample_type & PERF_SAMPLE_WEIGHT_TYPE)) { data->weight.full =3D pebs->lat; + data->sample_flags |=3D PERF_SAMPLE_WEIGHT_TYPE; + } =20 /* * data.data_src encodes the data source @@ -1620,9 +1622,10 @@ static void setup_pebs_fixed_sample_data(struct perf= _event *event, =20 if (x86_pmu.intel_cap.pebs_format >=3D 2) { /* Only set the TSX weight when no memory weight. */ - if ((sample_type & PERF_SAMPLE_WEIGHT_TYPE) && !fll) + if ((sample_type & PERF_SAMPLE_WEIGHT_TYPE) && !fll) { data->weight.full =3D intel_get_tsx_weight(pebs->tsx_tuning); - + data->sample_flags |=3D PERF_SAMPLE_WEIGHT_TYPE; + } if (sample_type & PERF_SAMPLE_TRANSACTION) data->txn =3D intel_get_tsx_transaction(pebs->tsx_tuning, pebs->ax); @@ -1764,6 +1767,7 @@ static void setup_pebs_adaptive_sample_data(struct pe= rf_event *event, data->weight.var1_dw =3D (u32)(weight & PEBS_LATENCY_MASK) ?: intel_get_tsx_weight(meminfo->tsx_tuning); } + data->sample_flags |=3D PERF_SAMPLE_WEIGHT_TYPE; } =20 if (sample_type & PERF_SAMPLE_DATA_SRC) diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index 1e12e79..06a587b 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -1012,7 +1012,6 @@ struct perf_sample_data { u64 addr; struct perf_raw_record *raw; u64 period; - union perf_sample_weight weight; u64 txn; union perf_mem_data_src data_src; =20 @@ -1021,6 +1020,7 @@ struct perf_sample_data { * perf_{prepare,output}_sample(). */ struct perf_branch_stack *br_stack; + union perf_sample_weight weight; =20 u64 type; u64 ip; @@ -1063,7 +1063,6 @@ static inline void perf_sample_data_init(struct perf_= sample_data *data, data->addr =3D addr; data->raw =3D NULL; data->period =3D period; - data->weight.full =3D 0; data->data_src.val =3D PERF_MEM_NA; data->txn =3D 0; } diff --git a/kernel/events/core.c b/kernel/events/core.c index 104c0c9..f0af45d 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -7408,6 +7408,9 @@ void perf_prepare_sample(struct perf_event_header *he= ader, header->size +=3D size; } =20 + if (filtered_sample_type & PERF_SAMPLE_WEIGHT_TYPE) + data->weight.full =3D 0; + if (sample_type & PERF_SAMPLE_REGS_INTR) { /* regs dump ABI info */ int size =3D sizeof(u64);