From nobody Tue Apr 7 00:44:52 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38C51ECAAD3 for ; Wed, 31 Aug 2022 18:47:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233117AbiHaSrI (ORCPT ); Wed, 31 Aug 2022 14:47:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55704 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232599AbiHaSrE (ORCPT ); Wed, 31 Aug 2022 14:47:04 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 077B120F47; Wed, 31 Aug 2022 11:47:00 -0700 (PDT) Date: Wed, 31 Aug 2022 18:46:56 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1661971618; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+OKUEhWIp9VKVjsnHD1yApk0+FPhgixyY4hEATs3zMU=; b=F8pMMbe3NX6/NSDhzWRQDyXodohyNAhP+qy0VK53E0vZJ+Sn6boWIvi/Odpl+h5KhXWYls LTcLFvA52hYdR5ttythBNptpVCoOAY9q/XiXeG0oS+J7rDHBmLzOyAR/6HZt+LBfq1WGnj YBvcadmM5W2/GCUmYHcNxQNAO7vKETKXxBFBHp3m+KpArVcOWrATRZTdS7cyY4R1zFO70z twiCGTrgU/bxN9NAMYejikS2ZM1J0CTjd22Z07fTrZdRWSVzjIUqxaA9pskAvKPvduEDaG 8gtTBb/Ds9zLEStloxUdx9hPi1Tsn5LNtrUz8L5nBir+RjHqAADkc9qcQtAiQA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1661971618; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+OKUEhWIp9VKVjsnHD1yApk0+FPhgixyY4hEATs3zMU=; b=30Qqdz+1NcKf0Jo4Ze8HFDIIOZrlcjCJcxXD6pGnYMyN7RypE6qaF2mQJlAHyTH4VrMewi uLWqCAexiOWX3FDw== From: "tip-bot2 for Kohei Tarumizu" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/cache] x86/resctrl: Fix to restore to original value when re-enabling hardware prefetch register Cc: Kohei Tarumizu , Dave Hansen , Reinette Chatre , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: =?utf-8?q?=3Ceb660f3c2010b79a792c573c02d01e8e841206ad=2E16613?= =?utf-8?q?58182=2Egit=2Ereinette=2Echatre=40intel=2Ecom=3E?= References: =?utf-8?q?=3Ceb660f3c2010b79a792c573c02d01e8e841206ad=2E166135?= =?utf-8?q?8182=2Egit=2Ereinette=2Echatre=40intel=2Ecom=3E?= MIME-Version: 1.0 Message-ID: <166197161669.401.18421704692518875233.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the x86/cache branch of tip: Commit-ID: 499c8bb4693d1c8d8f3d6dd38e5bdde3ff5bd906 Gitweb: https://git.kernel.org/tip/499c8bb4693d1c8d8f3d6dd38e5bdde3f= f5bd906 Author: Kohei Tarumizu AuthorDate: Wed, 24 Aug 2022 09:44:10 -07:00 Committer: Dave Hansen CommitterDate: Wed, 31 Aug 2022 11:42:17 -07:00 x86/resctrl: Fix to restore to original value when re-enabling hardware pre= fetch register The current pseudo_lock.c code overwrites the value of the MSR_MISC_FEATURE_CONTROL to 0 even if the original value is not 0. Therefore, modify it to save and restore the original values. Fixes: 018961ae5579 ("x86/intel_rdt: Pseudo-lock region creation/removal co= re") Fixes: 443810fe6160 ("x86/intel_rdt: Create debugfs files for pseudo-lockin= g testing") Fixes: 8a2fc0e1bc0c ("x86/intel_rdt: More precise L2 hit/miss measurements") Signed-off-by: Kohei Tarumizu Signed-off-by: Dave Hansen Acked-by: Reinette Chatre Link: https://lkml.kernel.org/r/eb660f3c2010b79a792c573c02d01e8e841206ad.16= 61358182.git.reinette.chatre@intel.com --- arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cp= u/resctrl/pseudo_lock.c index db813f8..4d83989 100644 --- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c +++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c @@ -420,6 +420,7 @@ static int pseudo_lock_fn(void *_rdtgrp) struct pseudo_lock_region *plr =3D rdtgrp->plr; u32 rmid_p, closid_p; unsigned long i; + u64 saved_msr; #ifdef CONFIG_KASAN /* * The registers used for local register variables are also used @@ -463,6 +464,7 @@ static int pseudo_lock_fn(void *_rdtgrp) * the buffer and evict pseudo-locked memory read earlier from the * cache. */ + saved_msr =3D __rdmsr(MSR_MISC_FEATURE_CONTROL); __wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0); closid_p =3D this_cpu_read(pqr_state.cur_closid); rmid_p =3D this_cpu_read(pqr_state.cur_rmid); @@ -514,7 +516,7 @@ static int pseudo_lock_fn(void *_rdtgrp) __wrmsr(IA32_PQR_ASSOC, rmid_p, closid_p); =20 /* Re-enable the hardware prefetcher(s) */ - wrmsr(MSR_MISC_FEATURE_CONTROL, 0x0, 0x0); + wrmsrl(MSR_MISC_FEATURE_CONTROL, saved_msr); local_irq_enable(); =20 plr->thread_done =3D 1; @@ -871,6 +873,7 @@ bool rdtgroup_pseudo_locked_in_hierarchy(struct rdt_dom= ain *d) static int measure_cycles_lat_fn(void *_plr) { struct pseudo_lock_region *plr =3D _plr; + u32 saved_low, saved_high; unsigned long i; u64 start, end; void *mem_r; @@ -879,6 +882,7 @@ static int measure_cycles_lat_fn(void *_plr) /* * Disable hardware prefetchers. */ + rdmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high); wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0); mem_r =3D READ_ONCE(plr->kmem); /* @@ -895,7 +899,7 @@ static int measure_cycles_lat_fn(void *_plr) end =3D rdtsc_ordered(); trace_pseudo_lock_mem_latency((u32)(end - start)); } - wrmsr(MSR_MISC_FEATURE_CONTROL, 0x0, 0x0); + wrmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high); local_irq_enable(); plr->thread_done =3D 1; wake_up_interruptible(&plr->lock_thread_wq); @@ -940,6 +944,7 @@ static int measure_residency_fn(struct perf_event_attr = *miss_attr, u64 hits_before =3D 0, hits_after =3D 0, miss_before =3D 0, miss_after = =3D 0; struct perf_event *miss_event, *hit_event; int hit_pmcnum, miss_pmcnum; + u32 saved_low, saved_high; unsigned int line_size; unsigned int size; unsigned long i; @@ -973,6 +978,7 @@ static int measure_residency_fn(struct perf_event_attr = *miss_attr, /* * Disable hardware prefetchers. */ + rdmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high); wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0); =20 /* Initialize rest of local variables */ @@ -1031,7 +1037,7 @@ static int measure_residency_fn(struct perf_event_att= r *miss_attr, */ rmb(); /* Re-enable hardware prefetchers */ - wrmsr(MSR_MISC_FEATURE_CONTROL, 0x0, 0x0); + wrmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high); local_irq_enable(); out_hit: perf_event_release_kernel(hit_event);