From nobody Sat Apr 18 02:47:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16A86C433EF for ; Tue, 19 Jul 2022 10:01:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237352AbiGSKBY (ORCPT ); Tue, 19 Jul 2022 06:01:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55816 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231980AbiGSKBR (ORCPT ); Tue, 19 Jul 2022 06:01:17 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97E0932BA3; Tue, 19 Jul 2022 03:01:16 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id E1FA3200C35; Tue, 19 Jul 2022 12:01:14 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 9B512200C32; Tue, 19 Jul 2022 12:01:14 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id A57511802204; Tue, 19 Jul 2022 18:01:12 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v1 01/10] dt-bindings: imx6q-pcie: Add iMX8MM PCIe EP mode compatible string Date: Tue, 19 Jul 2022 17:45:30 +0800 Message-Id: <1658223939-25478-2-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1658223939-25478-1-git-send-email-hongxing.zhu@nxp.com> References: <1658223939-25478-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add i.MX8MM PCIe endpoint mode compatible string. Signed-off-by: Richard Zhu Acked-by: Rob Herring --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Do= cumentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index 252e5b72aee0..d52c6396fe11 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -27,6 +27,7 @@ properties: - fsl,imx8mq-pcie - fsl,imx8mm-pcie - fsl,imx8mp-pcie + - fsl,imx8mm-pcie-ep =20 reg: items: --=20 2.25.1 From nobody Sat Apr 18 02:47:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A1D4C433EF for ; Tue, 19 Jul 2022 10:01:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237353AbiGSKBc (ORCPT ); Tue, 19 Jul 2022 06:01:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55832 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237012AbiGSKBS (ORCPT ); Tue, 19 Jul 2022 06:01:18 -0400 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8A9AF32EC9; Tue, 19 Jul 2022 03:01:17 -0700 (PDT) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 3664E1A0ABE; Tue, 19 Jul 2022 12:01:16 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id E3C2B1A0ABB; Tue, 19 Jul 2022 12:01:15 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id EE46A180222C; Tue, 19 Jul 2022 18:01:13 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v1 02/10] dt-bindings: imx6q-pcie: Add iMX8MQ PCIe EP mode compatible string Date: Tue, 19 Jul 2022 17:45:31 +0800 Message-Id: <1658223939-25478-3-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1658223939-25478-1-git-send-email-hongxing.zhu@nxp.com> References: <1658223939-25478-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add i.MX8MQ PCIe endpoint mode compatible string. Signed-off-by: Richard Zhu Acked-by: Rob Herring --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Do= cumentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index d52c6396fe11..85b7c1663054 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -28,6 +28,7 @@ properties: - fsl,imx8mm-pcie - fsl,imx8mp-pcie - fsl,imx8mm-pcie-ep + - fsl,imx8mq-pcie-ep =20 reg: items: --=20 2.25.1 From nobody Sat Apr 18 02:47:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0873ACCA481 for ; Tue, 19 Jul 2022 10:01:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237432AbiGSKBe (ORCPT ); Tue, 19 Jul 2022 06:01:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55868 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237340AbiGSKBU (ORCPT ); Tue, 19 Jul 2022 06:01:20 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D734632EC9; Tue, 19 Jul 2022 03:01:18 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 79529200C44; Tue, 19 Jul 2022 12:01:17 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 32BDE200C32; Tue, 19 Jul 2022 12:01:17 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 42BF0181D0CA; Tue, 19 Jul 2022 18:01:15 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v1 03/10] PCI: dwc: Kconfig: Add iMX PCIe EP mode support Date: Tue, 19 Jul 2022 17:45:32 +0800 Message-Id: <1658223939-25478-4-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1658223939-25478-1-git-send-email-hongxing.zhu@nxp.com> References: <1658223939-25478-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Since i.MX PCIe is one dual mode PCIe controller. Add i.MX PCIe EP mode support, and split the PCIe modes to the Root Complex mode and Endpoint mode. Signed-off-by: Richard Zhu --- drivers/pci/controller/dwc/Kconfig | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dw= c/Kconfig index 62ce3abf0f19..a24d8cacf1be 100644 --- a/drivers/pci/controller/dwc/Kconfig +++ b/drivers/pci/controller/dwc/Kconfig @@ -92,10 +92,33 @@ config PCI_EXYNOS functions to implement the driver. =20 config PCI_IMX6 - bool "Freescale i.MX6/7/8 PCIe controller" + bool + +config PCI_IMX6_HOST + bool "Freescale i.MX6/7/8 PCIe controller host mode" depends on ARCH_MXC || COMPILE_TEST depends on PCI_MSI_IRQ_DOMAIN select PCIE_DW_HOST + select PCI_IMX6 + help + Enables support for the PCIe controller Root Complex mode in the + iMX6/7/8 SoCs. + This controller can work either as EP or RC. In order to enable + host-specific features PCIE_DW_HOST must be selected and in order + to enable device-specific features PCIE_DW_EP must be selected. + +config PCI_IMX6_EP + bool "Freescale i.MX6/7/8 PCIe controller endpoint mode" + depends on ARCH_MXC || COMPILE_TEST + depends on PCI_ENDPOINT + select PCIE_DW_EP + select PCI_IMX6 + help + Enables support for the PCIe controller endpoint mode in the + iMX6/7/8 SoCs. + This controller can work either as EP or RC. In order to enable + host-specific features PCIE_DW_HOST must be selected and in order + to enable device-specific features PCIE_DW_EP must be selected. =20 config PCIE_SPEAR13XX bool "STMicroelectronics SPEAr PCIe controller" --=20 2.25.1 From nobody Sat Apr 18 02:47:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60436C43334 for ; Tue, 19 Jul 2022 10:01:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237439AbiGSKBg (ORCPT ); Tue, 19 Jul 2022 06:01:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237341AbiGSKBU (ORCPT ); Tue, 19 Jul 2022 06:01:20 -0400 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 246A933E38; Tue, 19 Jul 2022 03:01:20 -0700 (PDT) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id C0D261A0AD0; Tue, 19 Jul 2022 12:01:18 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 792C51A0ACF; Tue, 19 Jul 2022 12:01:18 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 8499B180222C; Tue, 19 Jul 2022 18:01:16 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v1 04/10] arm64: dts: Add iMX8MM PCIe EP support Date: Tue, 19 Jul 2022 17:45:33 +0800 Message-Id: <1658223939-25478-5-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1658223939-25478-1-git-send-email-hongxing.zhu@nxp.com> References: <1658223939-25478-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add iMX8MM PCIe EP support. Signed-off-by: Richard Zhu --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dt= s/freescale/imx8mm.dtsi index afb90f59c83c..eca7a42ac52a 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -1291,6 +1291,26 @@ pcie0: pcie@33800000 { status =3D "disabled"; }; =20 + pcie0_ep: pcie_ep@33800000 { + compatible =3D "fsl,imx8mm-pcie-ep"; + reg =3D <0x33800000 0x400000>, + <0x18000000 0x8000000>; + reg-names =3D "regs", "addr_space"; + num-lanes =3D <1>; + interrupts =3D ; + interrupt-names =3D "dma"; + fsl,max-link-speed =3D <2>; + power-domains =3D <&pgc_pcie>; + resets =3D <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>, + <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>; + reset-names =3D "apps", "turnoff"; + phys =3D <&pcie_phy>; + phy-names =3D "pcie-phy"; + num-ib-windows =3D <4>; + num-ob-windows =3D <4>; + status =3D "disabled"; + }; + gpu_3d: gpu@38000000 { compatible =3D "vivante,gc"; reg =3D <0x38000000 0x8000>; --=20 2.25.1 From nobody Sat Apr 18 02:47:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F81DCCA47F for ; Tue, 19 Jul 2022 10:01:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237458AbiGSKBm (ORCPT ); Tue, 19 Jul 2022 06:01:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55900 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237321AbiGSKBV (ORCPT ); Tue, 19 Jul 2022 06:01:21 -0400 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C8363357C3; Tue, 19 Jul 2022 03:01:20 -0700 (PDT) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 86E861A0AC9; Tue, 19 Jul 2022 12:01:19 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 48E311A0ACF; Tue, 19 Jul 2022 12:01:19 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id CCB971820F72; Tue, 19 Jul 2022 18:01:17 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v1 05/10] arm64: dts: Add iMX8MQ PCIe EP support Date: Tue, 19 Jul 2022 17:45:34 +0800 Message-Id: <1658223939-25478-6-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1658223939-25478-1-git-send-email-hongxing.zhu@nxp.com> References: <1658223939-25478-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add iMX8MQ PCIe EP support. Signed-off-by: Richard Zhu --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 27 +++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dt= s/freescale/imx8mq.dtsi index e9f0cdd10ab6..1c94e798e02f 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -1581,6 +1581,33 @@ pcie1: pcie@33c00000 { status =3D "disabled"; }; =20 + pcie1_ep: pcie_ep@33c00000 { + compatible =3D "fsl,imx8mq-pcie-ep"; + reg =3D <0x33c00000 0x000400000>, + <0x20000000 0x08000000>; + reg-names =3D "regs", "addr_space"; + num-lanes =3D <1>; + interrupts =3D ; + interrupt-names =3D "dma"; + fsl,max-link-speed =3D <2>; + power-domains =3D <&pgc_pcie>; + resets =3D <&src IMX8MQ_RESET_PCIEPHY2>, + <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_EN>, + <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF>; + reset-names =3D "pciephy", "apps", "turnoff"; + assigned-clocks =3D <&clk IMX8MQ_CLK_PCIE2_CTRL>, + <&clk IMX8MQ_CLK_PCIE2_PHY>, + <&clk IMX8MQ_CLK_PCIE2_AUX>; + assigned-clock-parents =3D <&clk IMX8MQ_SYS2_PLL_250M>, + <&clk IMX8MQ_SYS2_PLL_100M>, + <&clk IMX8MQ_SYS1_PLL_80M>; + assigned-clock-rates =3D <250000000>, <100000000>, + <10000000>; + num-ib-windows =3D <4>; + num-ob-windows =3D <4>; + status =3D "disabled"; + }; + gic: interrupt-controller@38800000 { compatible =3D "arm,gic-v3"; reg =3D <0x38800000 0x10000>, /* GIC Dist */ --=20 2.25.1 From nobody Sat Apr 18 02:47:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4F1B3C433EF for ; Tue, 19 Jul 2022 10:01:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237471AbiGSKBq (ORCPT ); Tue, 19 Jul 2022 06:01:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55966 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237346AbiGSKBX (ORCPT ); Tue, 19 Jul 2022 06:01:23 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D9FB333E39; Tue, 19 Jul 2022 03:01:22 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 57278200C39; Tue, 19 Jul 2022 12:01:21 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 10088200C35; Tue, 19 Jul 2022 12:01:21 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 19E351820F58; Tue, 19 Jul 2022 18:01:19 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v1 06/10] arm64: dts: Add iMX8MM PCIe EP support on EVK board Date: Tue, 19 Jul 2022 17:45:35 +0800 Message-Id: <1658223939-25478-7-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1658223939-25478-1-git-send-email-hongxing.zhu@nxp.com> References: <1658223939-25478-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add iMX8MM PCIe EP support on EVK board. Signed-off-by: Richard Zhu --- arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boo= t/dts/freescale/imx8mm-evk.dtsi index 7d6317d95b13..240699f4773d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi @@ -370,6 +370,20 @@ &pcie0 { status =3D "okay"; }; =20 +&pcie0_ep{ + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_pcie0>; + clocks =3D <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, + <&pcie0_refclk>; + clock-names =3D "pcie", "pcie_aux", "pcie_bus"; + assigned-clocks =3D <&clk IMX8MM_CLK_PCIE1_AUX>, + <&clk IMX8MM_CLK_PCIE1_CTRL>; + assigned-clock-rates =3D <10000000>, <250000000>; + assigned-clock-parents =3D <&clk IMX8MM_SYS_PLL2_50M>, + <&clk IMX8MM_SYS_PLL2_250M>; + status =3D "disabled"; +}; + &sai2 { #sound-dai-cells =3D <0>; pinctrl-names =3D "default"; --=20 2.25.1 From nobody Sat Apr 18 02:47:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 13297C43334 for ; Tue, 19 Jul 2022 10:01:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237321AbiGSKBs (ORCPT ); Tue, 19 Jul 2022 06:01:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56020 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237355AbiGSKBZ (ORCPT ); Tue, 19 Jul 2022 06:01:25 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A5A6E357D0; Tue, 19 Jul 2022 03:01:23 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 2A864200C3E; Tue, 19 Jul 2022 12:01:22 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id D9017200C35; Tue, 19 Jul 2022 12:01:21 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 628191802204; Tue, 19 Jul 2022 18:01:20 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v1 07/10] arm64: dts: Add iMX8MQ PCIe EP support on EVK board Date: Tue, 19 Jul 2022 17:45:36 +0800 Message-Id: <1658223939-25478-8-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1658223939-25478-1-git-send-email-hongxing.zhu@nxp.com> References: <1658223939-25478-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add iMX8MQ PCIe EP support on EVK board. Signed-off-by: Richard Zhu --- arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot= /dts/freescale/imx8mq-evk.dts index 82387b9cb800..9f3bad9b49a6 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts @@ -377,6 +377,18 @@ &pcie1 { status =3D "okay"; }; =20 +&pcie1_ep { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_pcie1>; + clocks =3D <&clk IMX8MQ_CLK_PCIE2_ROOT>, + <&clk IMX8MQ_CLK_PCIE2_AUX>, + <&clk IMX8MQ_CLK_PCIE2_PHY>, + <&pcie0_refclk>; + clock-names =3D "pcie", "pcie_aux", "pcie_phy", "pcie_bus"; + vph-supply =3D <&vgen5_reg>; + status =3D "disabled"; +}; + &pgc_gpu { power-supply =3D <&sw1a_reg>; }; --=20 2.25.1 From nobody Sat Apr 18 02:47:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B12DAC433EF for ; Tue, 19 Jul 2022 10:01:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237505AbiGSKBu (ORCPT ); Tue, 19 Jul 2022 06:01:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56180 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237387AbiGSKBa (ORCPT ); Tue, 19 Jul 2022 06:01:30 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3A4633718A; Tue, 19 Jul 2022 03:01:25 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 7609A200C48; Tue, 19 Jul 2022 12:01:23 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 2FD2A200C45; Tue, 19 Jul 2022 12:01:23 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id AB07B180222D; Tue, 19 Jul 2022 18:01:21 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v1 08/10] misc: pci_endpoint_test: Add iMX8 PCIe EP device support Date: Tue, 19 Jul 2022 17:45:37 +0800 Message-Id: <1658223939-25478-9-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1658223939-25478-1-git-send-email-hongxing.zhu@nxp.com> References: <1658223939-25478-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Set the DEVICE_ID of i.MX8 PCIe and add iMX8 PCIE EP device support in pci_endpoint_test driver. Signed-off-by: Richard Zhu --- drivers/misc/pci_endpoint_test.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_t= est.c index 8f786a225dcf..18cea40c697b 100644 --- a/drivers/misc/pci_endpoint_test.c +++ b/drivers/misc/pci_endpoint_test.c @@ -72,6 +72,7 @@ #define PCI_DEVICE_ID_TI_J7200 0xb00f #define PCI_DEVICE_ID_TI_AM64 0xb010 #define PCI_DEVICE_ID_LS1088A 0x80c0 +#define PCI_DEVICE_ID_IMX8 0x0808 =20 #define is_am654_pci_dev(pdev) \ ((pdev)->device =3D=3D PCI_DEVICE_ID_TI_AM654) @@ -958,6 +959,7 @@ static const struct pci_device_id pci_endpoint_test_tbl= [] =3D { { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x81c0), .driver_data =3D (kernel_ulong_t)&default_data, }, + { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_IMX8),}, { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_LS1088A), .driver_data =3D (kernel_ulong_t)&default_data, }, --=20 2.25.1 From nobody Sat Apr 18 02:47:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 31C93C43334 for ; Tue, 19 Jul 2022 10:01:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237511AbiGSKBx (ORCPT ); Tue, 19 Jul 2022 06:01:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237442AbiGSKBh (ORCPT ); Tue, 19 Jul 2022 06:01:37 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D6E6B33E2D; Tue, 19 Jul 2022 03:01:26 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id EFA78200C3B; Tue, 19 Jul 2022 12:01:24 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 6F896200C38; Tue, 19 Jul 2022 12:01:24 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 00973180222C; Tue, 19 Jul 2022 18:01:22 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v1 09/10] PCI: imx6: Add iMX8MM PCIe EP mode Date: Tue, 19 Jul 2022 17:45:38 +0800 Message-Id: <1658223939-25478-10-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1658223939-25478-1-git-send-email-hongxing.zhu@nxp.com> References: <1658223939-25478-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Based on i.MX8MM platforms, add the i.MX8MM PCIe EP mode support. Signed-off-by: Richard Zhu Reported-by: kernel test robot --- drivers/pci/controller/dwc/pci-imx6.c | 148 +++++++++++++++++++++++--- 1 file changed, 134 insertions(+), 14 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller= /dwc/pci-imx6.c index 655240ce60e0..ba4ac258c13d 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -51,6 +51,7 @@ enum imx6_pcie_variants { IMX7D, IMX8MQ, IMX8MM, + IMX8MM_EP, }; =20 #define IMX6_PCIE_FLAG_IMX6_PHY BIT(0) @@ -59,6 +60,7 @@ enum imx6_pcie_variants { =20 struct imx6_pcie_drvdata { enum imx6_pcie_variants variant; + enum dw_pcie_device_mode mode; u32 flags; int dbi_length; }; @@ -150,23 +152,27 @@ struct imx6_pcie { static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie) { WARN_ON(imx6_pcie->drvdata->variant !=3D IMX8MQ && - imx6_pcie->drvdata->variant !=3D IMX8MM); + imx6_pcie->drvdata->variant !=3D IMX8MM && + imx6_pcie->drvdata->variant !=3D IMX8MM_EP); return imx6_pcie->controller_id =3D=3D 1 ? IOMUXC_GPR16 : IOMUXC_GPR14; } =20 static void imx6_pcie_configure_type(struct imx6_pcie *imx6_pcie) { - unsigned int mask, val; + unsigned int mask, val, mode; + + if (imx6_pcie->drvdata->mode =3D=3D DW_PCIE_EP_TYPE) + mode =3D PCI_EXP_TYPE_ENDPOINT; + else + mode =3D PCI_EXP_TYPE_ROOT_PORT; =20 if (imx6_pcie->drvdata->variant =3D=3D IMX8MQ && imx6_pcie->controller_id =3D=3D 1) { mask =3D IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE; - val =3D FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, - PCI_EXP_TYPE_ROOT_PORT); + val =3D FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, mode); } else { mask =3D IMX6Q_GPR12_DEVICE_TYPE; - val =3D FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, - PCI_EXP_TYPE_ROOT_PORT); + val =3D FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, mode); } =20 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val); @@ -301,6 +307,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_p= cie) { switch (imx6_pcie->drvdata->variant) { case IMX8MM: + case IMX8MM_EP: /* * The PHY initialization had been done in the PHY * driver, break here directly. @@ -557,6 +564,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *i= mx6_pcie) case IMX7D: break; case IMX8MM: + case IMX8MM_EP: case IMX8MQ: ret =3D clk_prepare_enable(imx6_pcie->pcie_aux); if (ret) { @@ -601,6 +609,7 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie = *imx6_pcie) IMX7D_GPR12_PCIE_PHY_REFCLK_SEL); break; case IMX8MM: + case IMX8MM_EP: case IMX8MQ: clk_disable_unprepare(imx6_pcie->pcie_aux); break; @@ -669,6 +678,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pci= e *imx6_pcie) reset_control_assert(imx6_pcie->pciephy_reset); fallthrough; case IMX8MM: + case IMX8MM_EP: reset_control_assert(imx6_pcie->apps_reset); break; case IMX6SX: @@ -744,6 +754,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pc= ie *imx6_pcie) break; case IMX6Q: /* Nothing to do */ case IMX8MM: + case IMX8MM_EP: break; } =20 @@ -793,6 +804,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev) case IMX7D: case IMX8MQ: case IMX8MM: + case IMX8MM_EP: reset_control_deassert(imx6_pcie->apps_reset); break; } @@ -812,6 +824,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev) case IMX7D: case IMX8MQ: case IMX8MM: + case IMX8MM_EP: reset_control_assert(imx6_pcie->apps_reset); break; } @@ -992,8 +1005,102 @@ static const struct dw_pcie_host_ops imx6_pcie_host_= ops =3D { =20 static const struct dw_pcie_ops dw_pcie_ops =3D { .start_link =3D imx6_pcie_start_link, + .stop_link =3D imx6_pcie_stop_link, }; =20 +static void imx6_pcie_ep_init(struct dw_pcie_ep *ep) +{ + enum pci_barno bar; + struct dw_pcie *pci =3D to_dw_pcie_from_ep(ep); + + for (bar =3D BAR_0; bar <=3D BAR_5; bar++) + dw_pcie_ep_reset_bar(pci, bar); +} + +static int imx6_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no, + enum pci_epc_irq_type type, + u16 interrupt_num) +{ + struct dw_pcie *pci =3D to_dw_pcie_from_ep(ep); + + switch (type) { + case PCI_EPC_IRQ_LEGACY: + return dw_pcie_ep_raise_legacy_irq(ep, func_no); + case PCI_EPC_IRQ_MSI: + return dw_pcie_ep_raise_msi_irq(ep, func_no, interrupt_num); + case PCI_EPC_IRQ_MSIX: + return dw_pcie_ep_raise_msix_irq(ep, func_no, interrupt_num); + default: + dev_err(pci->dev, "UNKNOWN IRQ type\n"); + return -EINVAL; + } + + return 0; +} + +static const struct pci_epc_features imx8m_pcie_epc_features =3D { + .linkup_notifier =3D false, + .msi_capable =3D true, + .msix_capable =3D false, + .reserved_bar =3D 1 << BAR_1 | 1 << BAR_3, + .align =3D SZ_64K, +}; + +static const struct pci_epc_features* +imx6_pcie_ep_get_features(struct dw_pcie_ep *ep) +{ + return &imx8m_pcie_epc_features; +} + +static const struct dw_pcie_ep_ops pcie_ep_ops =3D { + .ep_init =3D imx6_pcie_ep_init, + .raise_irq =3D imx6_pcie_ep_raise_irq, + .get_features =3D imx6_pcie_ep_get_features, +}; + +static int imx6_add_pcie_ep(struct imx6_pcie *imx6_pcie, + struct platform_device *pdev) +{ + int ret; + unsigned int pcie_dbi2_offset; + struct dw_pcie_ep *ep; + struct resource *res; + struct dw_pcie *pci =3D imx6_pcie->pci; + struct pcie_port *pp =3D &pci->pp; + struct device *dev =3D pci->dev; + + imx6_pcie_host_init(pp); + ep =3D &pci->ep; + ep->ops =3D &pcie_ep_ops; + + switch (imx6_pcie->drvdata->variant) { + case IMX8MM_EP: + pcie_dbi2_offset =3D SZ_1M; + break; + default: + pcie_dbi2_offset =3D SZ_4K; + break; + } + pci->dbi_base2 =3D pci->dbi_base + pcie_dbi2_offset; + res =3D platform_get_resource_byname(pdev, IORESOURCE_MEM, "addr_space"); + if (!res) + return -EINVAL; + + ep->phys_base =3D res->start; + ep->addr_size =3D resource_size(res); + ep->page_size =3D SZ_64K; + + ret =3D dw_pcie_ep_init(ep); + if (ret) { + dev_err(dev, "failed to initialize endpoint\n"); + return ret; + } + /* Start LTSSM. */ + imx6_pcie_ltssm_enable(dev); + + return 0; +} + #ifdef CONFIG_PM_SLEEP static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie) { @@ -1181,6 +1288,7 @@ static int imx6_pcie_probe(struct platform_device *pd= ev) } break; case IMX8MM: + case IMX8MM_EP: imx6_pcie->pcie_aux =3D devm_clk_get(dev, "pcie_aux"); if (IS_ERR(imx6_pcie->pcie_aux)) return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_aux), @@ -1269,15 +1377,22 @@ static int imx6_pcie_probe(struct platform_device *= pdev) if (ret) return ret; =20 - ret =3D dw_pcie_host_init(&pci->pp); - if (ret < 0) - return ret; + if (imx6_pcie->drvdata->mode =3D=3D DW_PCIE_EP_TYPE) { + ret =3D imx6_add_pcie_ep(imx6_pcie, pdev); + if (ret < 0) + return ret; + } else { + ret =3D dw_pcie_host_init(&pci->pp); + if (ret < 0) + return ret; =20 - if (pci_msi_enabled()) { - u8 offset =3D dw_pcie_find_capability(pci, PCI_CAP_ID_MSI); - val =3D dw_pcie_readw_dbi(pci, offset + PCI_MSI_FLAGS); - val |=3D PCI_MSI_FLAGS_ENABLE; - dw_pcie_writew_dbi(pci, offset + PCI_MSI_FLAGS, val); + if (pci_msi_enabled()) { + u8 offset =3D dw_pcie_find_capability(pci, PCI_CAP_ID_MSI); + + val =3D dw_pcie_readw_dbi(pci, offset + PCI_MSI_FLAGS); + val |=3D PCI_MSI_FLAGS_ENABLE; + dw_pcie_writew_dbi(pci, offset + PCI_MSI_FLAGS, val); + } } =20 return 0; @@ -1322,6 +1437,10 @@ static const struct imx6_pcie_drvdata drvdata[] =3D { .variant =3D IMX8MM, .flags =3D IMX6_PCIE_FLAG_SUPPORTS_SUSPEND, }, + [IMX8MM_EP] =3D { + .variant =3D IMX8MM_EP, + .mode =3D DW_PCIE_EP_TYPE, + }, }; =20 static const struct of_device_id imx6_pcie_of_match[] =3D { @@ -1331,6 +1450,7 @@ static const struct of_device_id imx6_pcie_of_match[]= =3D { { .compatible =3D "fsl,imx7d-pcie", .data =3D &drvdata[IMX7D], }, { .compatible =3D "fsl,imx8mq-pcie", .data =3D &drvdata[IMX8MQ], }, { .compatible =3D "fsl,imx8mm-pcie", .data =3D &drvdata[IMX8MM], }, + { .compatible =3D "fsl,imx8mm-pcie-ep", .data =3D &drvdata[IMX8MM_EP], }, {}, }; =20 --=20 2.25.1 From nobody Sat Apr 18 02:47:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3C20C433EF for ; Tue, 19 Jul 2022 10:02:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237531AbiGSKCC (ORCPT ); Tue, 19 Jul 2022 06:02:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56454 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237443AbiGSKBi (ORCPT ); Tue, 19 Jul 2022 06:01:38 -0400 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8FB14371AF; Tue, 19 Jul 2022 03:01:27 -0700 (PDT) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 3285B1A0AD4; Tue, 19 Jul 2022 12:01:26 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id AF3A11A0AC9; Tue, 19 Jul 2022 12:01:25 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 425FA181D0CA; Tue, 19 Jul 2022 18:01:24 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com, kw@linux.com, frank.li@nxp.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v1 10/10] PCI: imx6: Add iMX8MQ PCIe EP support Date: Tue, 19 Jul 2022 17:45:39 +0800 Message-Id: <1658223939-25478-11-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1658223939-25478-1-git-send-email-hongxing.zhu@nxp.com> References: <1658223939-25478-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add the iMX8MQ PCIe EP support Signed-off-by: Richard Zhu --- drivers/pci/controller/dwc/pci-imx6.c | 34 +++++++++++++++++++++++---- 1 file changed, 29 insertions(+), 5 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller= /dwc/pci-imx6.c index ba4ac258c13d..1df634370291 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -52,6 +52,7 @@ enum imx6_pcie_variants { IMX8MQ, IMX8MM, IMX8MM_EP, + IMX8MQ_EP, }; =20 #define IMX6_PCIE_FLAG_IMX6_PHY BIT(0) @@ -152,6 +153,7 @@ struct imx6_pcie { static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie) { WARN_ON(imx6_pcie->drvdata->variant !=3D IMX8MQ && + imx6_pcie->drvdata->variant !=3D IMX8MQ_EP && imx6_pcie->drvdata->variant !=3D IMX8MM && imx6_pcie->drvdata->variant !=3D IMX8MM_EP); return imx6_pcie->controller_id =3D=3D 1 ? IOMUXC_GPR16 : IOMUXC_GPR14; @@ -166,13 +168,22 @@ static void imx6_pcie_configure_type(struct imx6_pcie= *imx6_pcie) else mode =3D PCI_EXP_TYPE_ROOT_PORT; =20 - if (imx6_pcie->drvdata->variant =3D=3D IMX8MQ && - imx6_pcie->controller_id =3D=3D 1) { - mask =3D IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE; - val =3D FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, mode); - } else { + switch (imx6_pcie->drvdata->variant) { + case IMX8MQ: + case IMX8MQ_EP: + if (imx6_pcie->controller_id =3D=3D 1) { + mask =3D IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE; + val =3D FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, + mode); + } else { + mask =3D IMX6Q_GPR12_DEVICE_TYPE; + val =3D FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, mode); + } + break; + default: mask =3D IMX6Q_GPR12_DEVICE_TYPE; val =3D FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, mode); + break; } =20 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val); @@ -314,6 +325,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_p= cie) */ break; case IMX8MQ: + case IMX8MQ_EP: /* * TODO: Currently this code assumes external * oscillator is being used @@ -566,6 +578,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *i= mx6_pcie) case IMX8MM: case IMX8MM_EP: case IMX8MQ: + case IMX8MQ_EP: ret =3D clk_prepare_enable(imx6_pcie->pcie_aux); if (ret) { dev_err(dev, "unable to enable pcie_aux clock\n"); @@ -611,6 +624,7 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie = *imx6_pcie) case IMX8MM: case IMX8MM_EP: case IMX8MQ: + case IMX8MQ_EP: clk_disable_unprepare(imx6_pcie->pcie_aux); break; default: @@ -675,6 +689,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pci= e *imx6_pcie) switch (imx6_pcie->drvdata->variant) { case IMX7D: case IMX8MQ: + case IMX8MQ_EP: reset_control_assert(imx6_pcie->pciephy_reset); fallthrough; case IMX8MM: @@ -716,6 +731,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pc= ie *imx6_pcie) =20 switch (imx6_pcie->drvdata->variant) { case IMX8MQ: + case IMX8MQ_EP: reset_control_deassert(imx6_pcie->pciephy_reset); break; case IMX7D: @@ -803,6 +819,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev) break; case IMX7D: case IMX8MQ: + case IMX8MQ_EP: case IMX8MM: case IMX8MM_EP: reset_control_deassert(imx6_pcie->apps_reset); @@ -823,6 +840,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev) break; case IMX7D: case IMX8MQ: + case IMX8MQ_EP: case IMX8MM: case IMX8MM_EP: reset_control_assert(imx6_pcie->apps_reset); @@ -1264,6 +1282,7 @@ static int imx6_pcie_probe(struct platform_device *pd= ev) "pcie_inbound_axi clock missing or invalid\n"); break; case IMX8MQ: + case IMX8MQ_EP: imx6_pcie->pcie_aux =3D devm_clk_get(dev, "pcie_aux"); if (IS_ERR(imx6_pcie->pcie_aux)) return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_aux), @@ -1441,6 +1460,10 @@ static const struct imx6_pcie_drvdata drvdata[] =3D { .variant =3D IMX8MM_EP, .mode =3D DW_PCIE_EP_TYPE, }, + [IMX8MQ_EP] =3D { + .variant =3D IMX8MQ_EP, + .mode =3D DW_PCIE_EP_TYPE, + }, }; =20 static const struct of_device_id imx6_pcie_of_match[] =3D { @@ -1451,6 +1474,7 @@ static const struct of_device_id imx6_pcie_of_match[]= =3D { { .compatible =3D "fsl,imx8mq-pcie", .data =3D &drvdata[IMX8MQ], }, { .compatible =3D "fsl,imx8mm-pcie", .data =3D &drvdata[IMX8MM], }, { .compatible =3D "fsl,imx8mm-pcie-ep", .data =3D &drvdata[IMX8MM_EP], }, + { .compatible =3D "fsl,imx8mq-pcie-ep", .data =3D &drvdata[IMX8MQ_EP], }, {}, }; =20 --=20 2.25.1