From nobody Mon Apr 27 15:21:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EFAAAC433EF for ; Mon, 13 Jun 2022 08:24:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239986AbiFMIYi (ORCPT ); Mon, 13 Jun 2022 04:24:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56666 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239937AbiFMIYc (ORCPT ); Mon, 13 Jun 2022 04:24:32 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A6C4B18B01; Mon, 13 Jun 2022 01:24:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1655108670; x=1686644670; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=YcRzvNF6OIPEmcbfbfdNRXkpW0N+rzRUGDeaIa3XXcQ=; b=oQBB57aYyGlcuKWKZxAdBwzVGYhwehekjBqtsK72qk9CsUR/rL97Jg6t quYHtJPvXnxdsQratNIzqe5Q0MvrQ8EvcQHncMDEDbiA0+fiDypykVLj6 RQC/DEAMTfiiFr4xMLmVL8nNXGu4K+I+0DnGmAgu7HzVW0boCxJSanOva Q=; Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 13 Jun 2022 01:24:30 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jun 2022 01:24:29 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 13 Jun 2022 01:24:29 -0700 Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 13 Jun 2022 01:24:25 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , CC: Srinivasa Rao Mandadapu , "Venkata Prasad Potturu" Subject: [PATCH v15 1/4] arm64: dts: qcom: sc7280: Add pinmux for I2S speaker and Headset Date: Mon, 13 Jun 2022 13:54:02 +0530 Message-ID: <1655108645-1517-2-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1655108645-1517-1-git-send-email-quic_srivasam@quicinc.com> References: <1655108645-1517-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add pinmux nodes for primary and secondary I2S for SC7280 based platforms. Signed-off-by: Srinivasa Rao Mandadapu Co-developed-by: Venkata Prasad Potturu Signed-off-by: Venkata Prasad Potturu Reviewed-by: Matthias Kaehlcke Reviewed-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 14 +++++++++++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 40 ++++++++++++++++++++++++++++= ++++ 2 files changed, 54 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts= /qcom/sc7280-idp.dtsi index 5eb6689..acf407a 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -367,6 +367,20 @@ bias-disable; }; =20 +&mi2s1_data0 { + drive-strength =3D <6>; + bias-disable; +}; + +&mi2s1_sclk { + drive-strength =3D <6>; + bias-disable; +}; + +&mi2s1_ws { + drive-strength =3D <6>; +}; + &pm7325_gpios { key_vol_up_default: key-vol-up-default { pins =3D "gpio6"; diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qco= m/sc7280.dtsi index e66fc67..fde55c3 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -3898,6 +3898,46 @@ function =3D "edp_hot"; }; =20 + mi2s0_data0: mi2s0-data0 { + pins =3D "gpio98"; + function =3D "mi2s0_data0"; + }; + + mi2s0_data1: mi2s0-data1 { + pins =3D "gpio99"; + function =3D "mi2s0_data1"; + }; + + mi2s0_mclk: mi2s0-mclk { + pins =3D "gpio96"; + function =3D "pri_mi2s"; + }; + + mi2s0_sclk: mi2s0-sclk { + pins =3D "gpio97"; + function =3D "mi2s0_sck"; + }; + + mi2s0_ws: mi2s0-ws { + pins =3D "gpio100"; + function =3D "mi2s0_ws"; + }; + + mi2s1_data0: mi2s1-data0 { + pins =3D "gpio107"; + function =3D "mi2s1_data0"; + }; + + mi2s1_sclk: mi2s1-sclk { + pins =3D "gpio106"; + function =3D "mi2s1_sck"; + }; + + mi2s1_ws: mi2s1-ws { + pins =3D "gpio108"; + function =3D "mi2s1_ws"; + }; + pcie1_clkreq_n: pcie1-clkreq-n { pins =3D "gpio79"; function =3D "pcie1_clkreqn"; --=20 2.7.4 From nobody Mon Apr 27 15:21:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7AA9FCCA47E for ; Mon, 13 Jun 2022 08:24:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240024AbiFMIYn (ORCPT ); Mon, 13 Jun 2022 04:24:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56698 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239964AbiFMIYf (ORCPT ); Mon, 13 Jun 2022 04:24:35 -0400 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BFE4B1A381; Mon, 13 Jun 2022 01:24:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1655108674; x=1686644674; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=/WFL/6RUt1bSg4t8Ottshj3eCK9B8n7w9Ytj9EJevnY=; b=nKS5b3IwZKvXljop4ohy0QaKQD+iXcHAqtw72YpCs7rEee/vCNtPVhsA YQAJoVI3D/+S/Xg7IBd8fCHY+iue6XxXlh0jXEB9eC3ynU7w381cuzur/ ic12YkedJV0K0/XCgSv54FhQepEXgMhw0CPtMIj9cYJ/0YgOTOAlGilKq 4=; Received: from unknown (HELO ironmsg02-sd.qualcomm.com) ([10.53.140.142]) by alexa-out-sd-01.qualcomm.com with ESMTP; 13 Jun 2022 01:24:34 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg02-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jun 2022 01:24:34 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 13 Jun 2022 01:24:33 -0700 Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 13 Jun 2022 01:24:29 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , CC: Srinivasa Rao Mandadapu , "Venkata Prasad Potturu" Subject: [PATCH v15 2/4] arm64: dts: qcom: sc7280: Add secondary MI2S pinmux specifications for CRD 3.0/3.1 Date: Mon, 13 Jun 2022 13:54:03 +0530 Message-ID: <1655108645-1517-3-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1655108645-1517-1-git-send-email-quic_srivasam@quicinc.com> References: <1655108645-1517-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add drive strength property for secondary MI2S on sc7280 based platforms of rev5+ (aka CRD 3.0/3.1) boards. Signed-off-by: Srinivasa Rao Mandadapu Co-developed-by: Venkata Prasad Potturu Signed-off-by: Venkata Prasad Potturu Reviewed-by: Matthias Kaehlcke --- .../dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi | 20 ++++++++++++++++= ++++ arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts | 1 + 2 files changed, 21 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385= .dtsi diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi b= /arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi new file mode 100644 index 0000000..32a1e78 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * sc7280 device tree source for boards using Max98360 and wcd9385 codec + * + * Copyright (c) 2022, The Linux Foundation. All rights reserved. + */ + +&mi2s1_data0 { + drive-strength =3D <6>; + bias-disable; +}; + +&mi2s1_sclk { + drive-strength =3D <6>; + bias-disable; +}; + +&mi2s1_ws { + drive-strength =3D <6>; +}; diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts b/arch/arm64= /boot/dts/qcom/sc7280-herobrine-crd.dts index a4ac33c..53feaed 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts @@ -8,6 +8,7 @@ /dts-v1/; =20 #include "sc7280-herobrine.dtsi" +#include "sc7280-herobrine-audio-wcd9385.dtsi" =20 / { model =3D "Qualcomm Technologies, Inc. sc7280 CRD platform (rev5+)"; --=20 2.7.4 From nobody Mon Apr 27 15:21:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B64E1C43334 for ; Mon, 13 Jun 2022 08:24:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240046AbiFMIYp (ORCPT ); Mon, 13 Jun 2022 04:24:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56900 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239996AbiFMIYm (ORCPT ); Mon, 13 Jun 2022 04:24:42 -0400 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 00C031EC61; Mon, 13 Jun 2022 01:24:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1655108679; x=1686644679; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=tZDCigRR1nc+XLeX+qrM6SNY2iYOJcy78bnyP+dxYX4=; b=cp+qSHCh+Wy/dszxs3NUmhg3wRsK4gnVidTSaLWof4Gz5qb+ZlTCVmd8 BV2pSDFknGmbruzgrit5NNxkb6/Xc8JZo50OYoEJkTA06ue0aOIdEwBwM 05lx/whA1zcanhpR5x+vmBZ9PQNtzgBe6vE4pmnUiLpCw57pLKl4mDRuQ o=; Received: from unknown (HELO ironmsg03-sd.qualcomm.com) ([10.53.140.143]) by alexa-out-sd-01.qualcomm.com with ESMTP; 13 Jun 2022 01:24:38 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg03-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jun 2022 01:24:38 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 13 Jun 2022 01:24:38 -0700 Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 13 Jun 2022 01:24:33 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , CC: Srinivasa Rao Mandadapu , "Venkata Prasad Potturu" Subject: [PATCH v15 3/4] arm64: dts: qcom: sc7280: add lpass lpi pin controller node Date: Mon, 13 Jun 2022 13:54:04 +0530 Message-ID: <1655108645-1517-4-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1655108645-1517-1-git-send-email-quic_srivasam@quicinc.com> References: <1655108645-1517-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add LPASS LPI pinctrl node required for Audio functionality on sc7280 based platforms. Signed-off-by: Srinivasa Rao Mandadapu Co-developed-by: Venkata Prasad Potturu Signed-off-by: Venkata Prasad Potturu Reviewed-by: Stephen Boyd Reviewed-by: Matthias Kaehlcke --- This patch set depends on: -- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=3D64= 9484 arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 62 +++++++++++++++++++++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 92 ++++++++++++++++++++++++++++= ++++ 2 files changed, 154 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts= /qcom/sc7280-idp.dtsi index acf407a..4461a07 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -367,6 +367,68 @@ bias-disable; }; =20 +&lpass_dmic01_clk { + drive-strength =3D <8>; + bias-disable; +}; + +&lpass_dmic01_clk_sleep { + drive-strength =3D <2>; +}; + +&lpass_dmic01_data { + bias-pull-down; +}; + +&lpass_dmic23_clk { + drive-strength =3D <8>; + bias-disable; +}; + +&lpass_dmic23_clk_sleep { + drive-strength =3D <2>; +}; + +&lpass_dmic23_data { + bias-pull-down; +}; + +&lpass_rx_swr_clk { + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-disable; +}; + +&lpass_rx_swr_clk_sleep { + bias-pull-down; +}; + +&lpass_rx_swr_data { + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-bus-hold; +}; + +&lpass_rx_swr_data_sleep { + bias-pull-down; +}; + +&lpass_tx_swr_clk { + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-disable; +}; + +&lpass_tx_swr_clk_sleep { + bias-pull-down; +}; + +&lpass_tx_swr_data { + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-bus-hold; +}; + &mi2s1_data0 { drive-strength =3D <6>; bias-disable; diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qco= m/sc7280.dtsi index fde55c3..b14134a 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2224,6 +2224,98 @@ qcom,bcm-voters =3D <&apps_bcm_voter>; }; =20 + lpass_tlmm: pinctrl@33c0000 { + compatible =3D "qcom,sc7280-lpass-lpi-pinctrl"; + reg =3D <0 0x033c0000 0x0 0x20000>, + <0 0x03550000 0x0 0x10000>; + qcom,adsp-bypass-mode; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&lpass_tlmm 0 0 15>; + + #clock-cells =3D <1>; + + lpass_dmic01_clk: dmic01-clk { + pins =3D "gpio6"; + function =3D "dmic1_clk"; + }; + + lpass_dmic01_clk_sleep: dmic01-clk-sleep { + pins =3D "gpio6"; + function =3D "dmic1_clk"; + }; + + lpass_dmic01_data: dmic01-data { + pins =3D "gpio7"; + function =3D "dmic1_data"; + }; + + lpass_dmic01_data_sleep: dmic01-data-sleep { + pins =3D "gpio7"; + function =3D "dmic1_data"; + }; + + lpass_dmic23_clk: dmic23-clk { + pins =3D "gpio8"; + function =3D "dmic2_clk"; + }; + + lpass_dmic23_clk_sleep: dmic23-clk-sleep { + pins =3D "gpio8"; + function =3D "dmic2_clk"; + }; + + lpass_dmic23_data: dmic23-data { + pins =3D "gpio9"; + function =3D "dmic2_data"; + }; + + lpass_dmic23_data_sleep: dmic23-data-sleep { + pins =3D "gpio9"; + function =3D "dmic2_data"; + }; + + lpass_rx_swr_clk: rx-swr-clk { + pins =3D "gpio3"; + function =3D "swr_rx_clk"; + }; + + lpass_rx_swr_clk_sleep: rx-swr-clk-sleep { + pins =3D "gpio3"; + function =3D "swr_rx_clk"; + }; + + lpass_rx_swr_data: rx-swr-data { + pins =3D "gpio4", "gpio5"; + function =3D "swr_rx_data"; + }; + + lpass_rx_swr_data_sleep: rx-swr-data-sleep { + pins =3D "gpio4", "gpio5"; + function =3D "swr_rx_data"; + }; + + lpass_tx_swr_clk: tx-swr-clk { + pins =3D "gpio0"; + function =3D "swr_tx_clk"; + }; + + lpass_tx_swr_clk_sleep: tx-swr-clk-sleep { + pins =3D "gpio0"; + function =3D "swr_tx_clk"; + }; + + lpass_tx_swr_data: tx-swr-data { + pins =3D "gpio1", "gpio2", "gpio14"; + function =3D "swr_tx_data"; + }; + + lpass_tx_swr_data_sleep: tx-swr-data-sleep { + pins =3D "gpio1", "gpio2", "gpio14"; + function =3D "swr_tx_data"; + }; + }; + gpu: gpu@3d00000 { compatible =3D "qcom,adreno-635.0", "qcom,adreno"; reg =3D <0 0x03d00000 0 0x40000>, --=20 2.7.4 From nobody Mon Apr 27 15:21:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47748CCA47B for ; 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Received: from unknown (HELO ironmsg-SD-alpha.qualcomm.com) ([10.53.140.30]) by alexa-out-sd-01.qualcomm.com with ESMTP; 13 Jun 2022 01:24:43 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg-SD-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jun 2022 01:24:43 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 13 Jun 2022 01:24:42 -0700 Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 13 Jun 2022 01:24:38 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , CC: Srinivasa Rao Mandadapu , "Venkata Prasad Potturu" Subject: [PATCH v15 4/4] arm64: dts: qcom: sc7280-herobrine: Add lpi pinmux properties for CRD 3.0/3.1 Date: Mon, 13 Jun 2022 13:54:05 +0530 Message-ID: <1655108645-1517-5-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1655108645-1517-1-git-send-email-quic_srivasam@quicinc.com> References: <1655108645-1517-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add LPASS LPI pinctrl properties, which are required for Audio functionality on herobrine based platforms of rev5+ (aka CRD 3.0/3.1) boards. Signed-off-by: Srinivasa Rao Mandadapu Co-developed-by: Venkata Prasad Potturu Signed-off-by: Venkata Prasad Potturu Reviewed-by: Matthias Kaehlcke --- arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts | 61 +++++++++++++++++++= ++++ 1 file changed, 61 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts b/arch/arm64= /boot/dts/qcom/sc7280-herobrine-crd.dts index 53feaed..d92575e 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts @@ -144,6 +144,67 @@ ap_ts_pen_1v8: &i2c13 { * - If a pin is totally internal to Qcard then it gets Qcard name. * - If a pin is not hooked up on Qcard, it gets no name. */ +&lpass_dmic01_clk { + drive-strength =3D <8>; + bias-disable; +}; + +&lpass_dmic01_clk_sleep { + drive-strength =3D <2>; +}; + +&lpass_dmic01_data { + bias-pull-down; +}; + +&lpass_dmic23_clk { + drive-strength =3D <8>; + bias-disable; +}; + +&lpass_dmic23_clk_sleep { + drive-strength =3D <2>; +}; + +&lpass_dmic23_data { + bias-pull-down; +}; + +&lpass_rx_swr_clk { + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-disable; +}; + +&lpass_rx_swr_clk_sleep { + bias-pull-down; +}; + +&lpass_rx_swr_data { + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-bus-hold; +}; + +&lpass_rx_swr_data_sleep { + bias-pull-down; +}; + +&lpass_tx_swr_clk { + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-disable; +}; + +&lpass_tx_swr_clk_sleep { + bias-pull-down; +}; + +&lpass_tx_swr_data { + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-bus-hold; +}; =20 &pm8350c_gpios { gpio-line-names =3D "FLASH_STROBE_1", /* 1 */ --=20 2.7.4