From nobody Mon May 11 05:36:40 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E60FC433F5 for ; Wed, 13 Apr 2022 15:21:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236436AbiDMPYO (ORCPT ); Wed, 13 Apr 2022 11:24:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38562 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232655AbiDMPYJ (ORCPT ); Wed, 13 Apr 2022 11:24:09 -0400 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C0B2647566; Wed, 13 Apr 2022 08:21:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1649863307; x=1681399307; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=gBPty2yd3WTLPcRvlW50fid4XqFv/gBq8iQ8ksQ0Nrg=; b=aNgfWCcjrb4UEW+Wxh/0LxxEt5/6EAbu7bnWfDh36Dga4y+xm4ubPPuc tyGHK1fJYbrrlKKxTHlm1cNtu5A+3hxGGjMKkOBhO8f49q5XRhRlw9n6c /x4ot7g24Q9v+n6HvThTz6NMBIY1+32qJDzdA9CsfqqxT9cKJF9PGedTI M=; Received: from unknown (HELO ironmsg02-sd.qualcomm.com) ([10.53.140.142]) by alexa-out-sd-01.qualcomm.com with ESMTP; 13 Apr 2022 08:21:47 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg02-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2022 08:21:46 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 13 Apr 2022 08:21:46 -0700 Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 13 Apr 2022 08:21:42 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , CC: Srinivasa Rao Mandadapu , "Venkata Prasad Potturu" Subject: [PATCH v7 1/4] arm64: dts: qcom: sc7280: Add nodes for soundwire and va tx rx digital macro codecs Date: Wed, 13 Apr 2022 20:51:14 +0530 Message-ID: <1649863277-31615-2-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1649863277-31615-1-git-send-email-quic_srivasam@quicinc.com> References: <1649863277-31615-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" SC7280 has VA, TX and RX macros with SoundWire Controllers to attach with external codecs using soundwire masters. Add these nodes for sc7280 based platforms audio use case. Signed-off-by: Srinivasa Rao Mandadapu Co-developed-by: Venkata Prasad Potturu Signed-off-by: Venkata Prasad Potturu --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 122 +++++++++++++++++++++++++++++++= ++++ 1 file changed, 122 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qco= m/sc7280.dtsi index 50fea0e..c0f127f 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -1980,6 +1980,128 @@ #clock-cells =3D <1>; }; =20 + lpass_rx_macro: codec@3200000 { + compatible =3D "qcom,sc7280-lpass-rx-macro"; + reg =3D <0 0x03200000 0 0x1000>; + + status =3D "disabled"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&lpass_rx_swr>; + + clocks =3D <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>, + <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>, + <&lpass_va_macro>; + clock-names =3D "mclk", "npl", "fsgen"; + + power-domains =3D <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>, + <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>; + power-domain-names =3D"macro", "dcodec"; + + #clock-cells =3D <0>; + #sound-dai-cells =3D <1>; + }; + + swr0: soundwire@3210000 { + compatible =3D "qcom,soundwire-v1.6.0"; + reg =3D <0 0x03210000 0 0x2000>; + + interrupts =3D ; + clocks =3D <&lpass_rx_macro>; + clock-names =3D "iface"; + + qcom,din-ports =3D <0>; + qcom,dout-ports =3D <5>; + + resets =3D <&lpass_audiocc LPASS_AUDIO_SWR_RX_CGCR>; + reset-names =3D "swr_audio_cgcr"; + + qcom,ports-word-length =3D /bits/ 8 <0x01 0x07 0x04 0xff 0xff>; + qcom,ports-sinterval-low =3D /bits/ 8 <0x03 0x3f 0x1f 0x03 0x03>; + qcom,ports-offset1 =3D /bits/ 8 <0x00 0x00 0x0b 0x01 0x01>; + qcom,ports-offset2 =3D /bits/ 8 <0x00 0x00 0x0b 0x00 0x00>; + qcom,ports-lane-control =3D /bits/ 8 <0x01 0x00 0x00 0x00 0x00>; + qcom,ports-block-pack-mode =3D /bits/ 8 <0xff 0x00 0x01 0xff 0xff>; + qcom,ports-hstart =3D /bits/ 8 <0xff 0x03 0xff 0xff 0xff>; + qcom,ports-hstop =3D /bits/ 8 <0xff 0x06 0xff 0xff 0xff>; + qcom,ports-block-group-count =3D /bits/ 8 <0xff 0xff 0xff 0xff 0x00>; + + #sound-dai-cells =3D <1>; + #address-cells =3D <2>; + #size-cells =3D <0>; + }; + + lpass_tx_macro: codec@3220000 { + compatible =3D "qcom,sc7280-lpass-tx-macro"; + reg =3D <0 0x03220000 0 0x1000>; + + status =3D "disabled"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&lpass_tx_swr>; + + clocks =3D <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>, + <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>, + <&lpass_va_macro>; + clock-names =3D "mclk", "npl", "fsgen"; + + power-domains =3D <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>, + <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>; + power-domain-names =3D"macro", "dcodec"; + + #clock-cells =3D <0>; + #sound-dai-cells =3D <1>; + }; + + swr1: soundwire@3230000 { + compatible =3D "qcom,soundwire-v1.6.0"; + reg =3D <0 0x03230000 0 0x2000>; + + interrupts-extended =3D <&intc GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 130 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names =3D "swr_master_irq", "swr_wake_irq"; + clocks =3D <&lpass_tx_macro>; + clock-names =3D "iface"; + + qcom,din-ports =3D <3>; + qcom,dout-ports =3D <0>; + + resets =3D <&lpass_audiocc LPASS_AUDIO_SWR_TX_CGCR>; + reset-names =3D "swr_audio_cgcr"; + + qcom,ports-sinterval-low =3D /bits/ 8 <0x01 0x03 0x03>; + qcom,ports-offset1 =3D /bits/ 8 <0x01 0x00 0x02>; + qcom,ports-offset2 =3D /bits/ 8 <0x00 0x00 0x00>; + qcom,ports-hstart =3D /bits/ 8 <0xff 0xff 0xff>; + qcom,ports-hstop =3D /bits/ 8 <0xff 0xff 0xff>; + qcom,ports-word-length =3D /bits/ 8 <0xff 0x00 0xff>; + qcom,ports-block-pack-mode =3D /bits/ 8 <0xff 0xff 0xff>; + qcom,ports-block-group-count =3D /bits/ 8 <0xff 0xff 0xff>; + qcom,ports-lane-control =3D /bits/ 8 <0x00 0x01 0x00>; + qcom,port-offset =3D <1>; + + #sound-dai-cells =3D <1>; + #address-cells =3D <2>; + #size-cells =3D <0>; + }; + + lpass_va_macro: codec@3370000 { + compatible =3D "qcom,sc7280-lpass-va-macro"; + reg =3D <0 0x03370000 0 0x1000>; + + status =3D "disabled"; + pinctrl-0 =3D <&lpass_dmic01>; + pinctrl-names =3D "default"; + + clocks =3D <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>; + clock-names =3D "mclk"; + + power-domains =3D <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>, + <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>; + power-domain-names =3D"macro", "dcodec"; + + #clock-cells =3D <0>; + #sound-dai-cells =3D <1>; + }; + lpass_ag_noc: interconnect@3c40000 { reg =3D <0 0x03c40000 0 0xf080>; compatible =3D "qcom,sc7280-lpass-ag-noc"; --=20 2.7.4 From nobody Mon May 11 05:36:40 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07919C433EF for ; Wed, 13 Apr 2022 15:21:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236451AbiDMPYR (ORCPT ); Wed, 13 Apr 2022 11:24:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38616 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236441AbiDMPYN (ORCPT ); Wed, 13 Apr 2022 11:24:13 -0400 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2D6454D9CF; Wed, 13 Apr 2022 08:21:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1649863312; x=1681399312; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=9o2bFOxnslGG0yBjqTOEYQZk3iGdEFqDz33jYt55X+8=; b=hKIRf3OL5YqwTHkCgKbfPrnZnusF3avgew/uldXwCnEXaJD+hiAWrt5e pRh5JG+Nt7S9pmFtxGqlu+3m5dBmcbFS8r4Spk3R5vh5ojKDuYHXJPpvr WKqvViQqj42uZGewW3sLSCgohE8012T86JcBXGhoaIg9QzvrnZxi3TBg9 g=; Received: from unknown (HELO ironmsg04-sd.qualcomm.com) ([10.53.140.144]) by alexa-out-sd-01.qualcomm.com with ESMTP; 13 Apr 2022 08:21:52 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg04-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2022 08:21:51 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 13 Apr 2022 08:21:50 -0700 Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 13 Apr 2022 08:21:46 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , CC: Srinivasa Rao Mandadapu , "Venkata Prasad Potturu" Subject: [PATCH v7 2/4] arm64: dts: qcom: sc7280: Add nodes for wcd9385 and max98360a codec Date: Wed, 13 Apr 2022 20:51:15 +0530 Message-ID: <1649863277-31615-3-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1649863277-31615-1-git-send-email-quic_srivasam@quicinc.com> References: <1649863277-31615-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add wcd938x and max98360a codecs for audio use case on sc7280 based platforms. Add tlmm gpio property in wcd938x node for switching CTIA/OMTP Headset. Add amp_en node for max98360a codec. Signed-off-by: Srinivasa Rao Mandadapu Co-developed-by: Venkata Prasad Potturu Signed-off-by: Venkata Prasad Potturu --- arch/arm64/boot/dts/qcom/sc7280-crd.dts | 6 ++ arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 8 +++ arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 94 ++++++++++++++++++++++= ++++ 3 files changed, 108 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/= qcom/sc7280-crd.dts index e2efbdd..b944366 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts @@ -84,6 +84,12 @@ ap_ts_pen_1v8: &i2c13 { pins =3D "gpio51"; }; =20 +&wcd938x { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&us_euro_hs_sel>; + us-euro-gpios =3D <&tlmm 81 GPIO_ACTIVE_HIGH>; +}; + &tlmm { tp_int_odl: tp-int-odl { pins =3D "gpio7"; diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/bo= ot/dts/qcom/sc7280-herobrine.dtsi index dc17f20..8e4f822 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi @@ -20,6 +20,14 @@ #include "sc7280-chrome-common.dtsi" =20 / { + max98360a: audio-codec-0 { + compatible =3D "maxim,max98360a"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&_en>; + sdmode-gpios =3D <&tlmm 63 GPIO_ACTIVE_HIGH>; + #sound-dai-cells =3D <0>; + }; + chosen { stdout-path =3D "serial0:115200n8"; }; diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts= /qcom/sc7280-idp.dtsi index 110d9e9..6004c08 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -20,6 +20,41 @@ serial1 =3D &uart7; }; =20 + max98360a: audio-codec-0 { + compatible =3D "maxim,max98360a"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&_en>; + sdmode-gpios =3D <&tlmm 63 GPIO_ACTIVE_HIGH>; + #sound-dai-cells =3D <0>; + }; + + wcd938x: audio-codec-1 { + compatible =3D "qcom,wcd9385-codec"; + #sound-dai-cells =3D <1>; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wcd_reset_n>, <&wcd_reset_n_sleep>; + reset-gpios =3D <&tlmm 83 GPIO_ACTIVE_HIGH>; + + qcom,rx-device =3D <&wcd_rx>; + qcom,tx-device =3D <&wcd_tx>; + + vdd-rxtx-supply =3D <&vreg_l18b_1p8>; + vdd-io-supply =3D <&vreg_l18b_1p8>; + vdd-buck-supply =3D <&vreg_l17b_1p8>; + vdd-mic-bias-supply =3D <&vreg_bob>; + + qcom,micbias1-microvolt =3D <1800000>; + qcom,micbias2-microvolt =3D <1800000>; + qcom,micbias3-microvolt =3D <1800000>; + qcom,micbias4-microvolt =3D <1800000>; + + qcom,mbhc-buttons-vthreshold-microvolt =3D <75000 150000 237000 500000 5= 00000 + 500000 500000 500000>; + qcom,mbhc-headset-vthreshold-microvolt =3D <1700000>; + qcom,mbhc-headphone-vthreshold-microvolt =3D <50000>; + }; + gpio-keys { compatible =3D "gpio-keys"; label =3D "gpio-keys"; @@ -238,6 +273,19 @@ modem-init; }; =20 +&lpass_rx_macro { + status =3D "okay"; +}; + +&lpass_tx_macro { + status =3D "okay"; +}; + +&lpass_va_macro { + status =3D "okay"; + vdd-micb-supply =3D <&vreg_bob>; +}; + &pcie1 { status =3D "okay"; perst-gpio =3D <&tlmm 2 GPIO_ACTIVE_LOW>; @@ -298,6 +346,24 @@ cd-gpios =3D <&tlmm 91 GPIO_ACTIVE_LOW>; }; =20 +&swr0 { + wcd_rx: codec@0,4 { + compatible =3D "sdw20217010d00"; + reg =3D <0 4>; + #sound-dai-cells =3D <1>; + qcom,rx-port-mapping =3D <1 2 3 4 5>; + }; +}; + +&swr1 { + wcd_tx: codec@0,3 { + compatible =3D "sdw20217010d00"; + reg =3D <0 3>; + #sound-dai-cells =3D <1>; + qcom,tx-port-mapping =3D <1 2 3 4>; + }; +}; + &uart5 { compatible =3D "qcom,geni-debug-uart"; status =3D "okay"; @@ -561,6 +627,12 @@ }; =20 &tlmm { + amp_en: amp-en { + pins =3D "gpio63"; + bias-pull-down; + drive-strength =3D <2>; + }; + bt_en: bt-en { pins =3D "gpio85"; function =3D "gpio"; @@ -643,5 +715,27 @@ function =3D "gpio"; bias-pull-down; }; + + us_euro_hs_sel: us-euro-hs-sel { + pins =3D "gpio81"; + function =3D "gpio"; + bias-pull-down; + drive-strength =3D <2>; + }; + + wcd_reset_n: wcd-reset-n { + pins =3D "gpio83"; + function =3D "gpio"; + drive-strength =3D <8>; + output-high; + }; + + wcd_reset_n_sleep: wcd-reset-n-sleep { + pins =3D "gpio83"; + function =3D "gpio"; + drive-strength =3D <8>; + bias-disable; + output-low; + }; }; =20 --=20 2.7.4 From nobody Mon May 11 05:36:40 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E24F2C433FE for ; Wed, 13 Apr 2022 15:22:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236460AbiDMPYY (ORCPT ); Wed, 13 Apr 2022 11:24:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38862 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234848AbiDMPYW (ORCPT ); Wed, 13 Apr 2022 11:24:22 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B4446522CD; Wed, 13 Apr 2022 08:21:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1649863316; x=1681399316; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=1Cq27c9y9aIcI3AsQo3+huqwP1xiaPXyynvg3nDbUuA=; b=o0JUy1qu1iRXb6AyOh4Xsn/da7YDC+ONWEA/ondzbgevCQn75sxTmO9Z aC3lehgy348cckjMDiPafmJpdKGmEm3+RGuI8u3PESpPiJfEz9a0jMbjA paPBgzrqt/RA36ZwTq1B12Td1fXI7RGitVwW2PzDmlYc7PBpETlZWTFaG k=; Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 13 Apr 2022 08:21:56 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2022 08:21:55 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 13 Apr 2022 08:21:55 -0700 Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 13 Apr 2022 08:21:51 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , CC: Srinivasa Rao Mandadapu , "Venkata Prasad Potturu" Subject: [PATCH v7 3/4] arm64: dts: qcom: sc7280: Add lpass cpu node Date: Wed, 13 Apr 2022 20:51:16 +0530 Message-ID: <1649863277-31615-4-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1649863277-31615-1-git-send-email-quic_srivasam@quicinc.com> References: <1649863277-31615-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add lpass cpu node for audio on sc7280 based platforms. Signed-off-by: Srinivasa Rao Mandadapu Co-developed-by: Venkata Prasad Potturu Signed-off-by: Venkata Prasad Potturu Reviewed-by: Matthias Kaehlcke Reviewed-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 28 +++++++++++++++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 62 ++++++++++++++++++++++++++++= ++++ 2 files changed, 90 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts= /qcom/sc7280-idp.dtsi index 6004c08..cf62d06 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -273,6 +273,34 @@ modem-init; }; =20 +&lpass_cpu { + status =3D "okay"; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>; + + dai-link@1 { + reg =3D ; + qcom,playback-sd-lines =3D <0>; + }; + + dai-link@5 { + reg =3D ; + }; + + dai-link@6 { + reg =3D ; + }; + + dai-link@19 { + reg =3D ; + }; + + dai-link@25 { + reg =3D ; + }; +}; + &lpass_rx_macro { status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qco= m/sc7280.dtsi index c0f127f..69cb78f 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -19,6 +19,7 @@ #include #include #include +#include #include =20 / { @@ -2102,6 +2103,67 @@ #sound-dai-cells =3D <1>; }; =20 + lpass_cpu: audio@3987000 { + compatible =3D "qcom,sc7280-lpass-cpu"; + + reg =3D <0 0x03987000 0 0x68000>, + <0 0x03b00000 0 0x29000>, + <0 0x03260000 0 0xc000>, + <0 0x03280000 0 0x29000>, + <0 0x03340000 0 0x29000>, + <0 0x0336c000 0 0x3000>; + reg-names =3D "lpass-hdmiif", + "lpass-lpaif", + "lpass-rxtx-cdc-dma-lpm", + "lpass-rxtx-lpaif", + "lpass-va-lpaif", + "lpass-va-cdc-dma-lpm"; + + iommus =3D <&apps_smmu 0x1820 0>, + <&apps_smmu 0x1821 0>, + <&apps_smmu 0x1832 0>; + + power-domains =3D <&rpmhpd SC7280_LCX>; + power-domain-names =3D "lcx"; + required-opps =3D <&rpmhpd_opp_nom>; + + clocks =3D <&lpass_aon LPASS_AON_CC_AUDIO_HM_H_CLK>, + <&lpass_audiocc LPASS_AUDIO_CC_EXT_MCLK0_CLK>, + <&lpasscore LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK>, + <&lpasscore LPASS_CORE_CC_EXT_IF0_IBIT_CLK>, + <&lpasscore LPASS_CORE_CC_EXT_IF1_IBIT_CLK>, + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM_CLK>, + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM0_CLK>, + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM1_CLK>, + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM2_CLK>, + <&lpass_aon LPASS_AON_CC_VA_MEM0_CLK>; + clock-names =3D "aon_cc_audio_hm_h", + "audio_cc_ext_mclk0", + "core_cc_sysnoc_mport_core", + "core_cc_ext_if0_ibit", + "core_cc_ext_if1_ibit", + "audio_cc_codec_mem", + "audio_cc_codec_mem0", + "audio_cc_codec_mem1", + "audio_cc_codec_mem2", + "aon_cc_va_mem0"; + + #sound-dai-cells =3D <1>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + interrupts =3D , + , + , + ; + interrupt-names =3D "lpass-irq-lpaif", + "lpass-irq-hdmi", + "lpass-irq-vaif", + "lpass-irq-rxtxif"; + + status =3D "disabled"; + }; + lpass_ag_noc: interconnect@3c40000 { reg =3D <0 0x03c40000 0 0xf080>; compatible =3D "qcom,sc7280-lpass-ag-noc"; --=20 2.7.4 From nobody Mon May 11 05:36:40 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36583C433F5 for ; Wed, 13 Apr 2022 15:22:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236466AbiDMPY2 (ORCPT ); Wed, 13 Apr 2022 11:24:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38880 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236464AbiDMPYX (ORCPT ); Wed, 13 Apr 2022 11:24:23 -0400 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8D4FD5C670; Wed, 13 Apr 2022 08:22:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1649863320; x=1681399320; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=7AhGrgiBzTAvtgoFnt8no14wFX0UcjnvcY//DBl9blk=; b=ZXeF3dJjM/JQ+Vv/kIMqrzf6dD6aiW9vi5JZls3d31a0MgbEfiRiVdLu 60qX7KrngExLgvy0HcJPVt1MBItSVfKVOUVmO9ScFPoipPjSn/94c7evA A82dHgmelZtULreuNC5FMV68DjDxchL7VxBCBpO6IwP81mR5jeU7EGus2 o=; Received: from unknown (HELO ironmsg04-sd.qualcomm.com) ([10.53.140.144]) by alexa-out-sd-01.qualcomm.com with ESMTP; 13 Apr 2022 08:22:00 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg04-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2022 08:22:00 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 13 Apr 2022 08:21:59 -0700 Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 13 Apr 2022 08:21:55 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , CC: Srinivasa Rao Mandadapu , "Venkata Prasad Potturu" Subject: [PATCH v7 4/4] arm64: dts: qcom: sc7280: Add dt nodes for sound card Date: Wed, 13 Apr 2022 20:51:17 +0530 Message-ID: <1649863277-31615-5-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1649863277-31615-1-git-send-email-quic_srivasam@quicinc.com> References: <1649863277-31615-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add dt nodes for sound card support, which is using WCD938x headset playback, capture, I2S speaker playback and DMICs via VA macro. Signed-off-by: Srinivasa Rao Mandadapu Co-developed-by: Venkata Prasad Potturu Signed-off-by: Venkata Prasad Potturu --- arch/arm64/boot/dts/qcom/sc7280-crd.dts | 23 ++++++++ arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 93 ++++++++++++++++++++++++++++= ++++ 2 files changed, 116 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/= qcom/sc7280-crd.dts index b944366..1e16854 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts @@ -90,6 +90,29 @@ ap_ts_pen_1v8: &i2c13 { us-euro-gpios =3D <&tlmm 81 GPIO_ACTIVE_HIGH>; }; =20 +&sound { + audio-routing =3D + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "AMIC1", "MIC BIAS1", + "AMIC2", "MIC BIAS2", + "VA DMIC0", "MIC BIAS1", + "VA DMIC1", "MIC BIAS1", + "VA DMIC2", "MIC BIAS3", + "VA DMIC3", "MIC BIAS3", + "TX SWR_ADC0", "ADC1_OUTPUT", + "TX SWR_ADC1", "ADC2_OUTPUT", + "TX SWR_ADC2", "ADC3_OUTPUT", + "TX SWR_DMIC0", "DMIC1_OUTPUT", + "TX SWR_DMIC1", "DMIC2_OUTPUT", + "TX SWR_DMIC2", "DMIC3_OUTPUT", + "TX SWR_DMIC3", "DMIC4_OUTPUT", + "TX SWR_DMIC4", "DMIC5_OUTPUT", + "TX SWR_DMIC5", "DMIC6_OUTPUT", + "TX SWR_DMIC6", "DMIC7_OUTPUT", + "TX SWR_DMIC7", "DMIC8_OUTPUT"; +}; + &tlmm { tp_int_odl: tp-int-odl { pins =3D "gpio7"; diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts= /qcom/sc7280-idp.dtsi index cf62d06..a7c884a 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -84,6 +84,99 @@ pinctrl-names =3D "default"; pinctrl-0 =3D <&nvme_pwren>; }; + + sound: sound { + compatible =3D "google,sc7280-herobrine"; + model =3D "sc7280-wcd938x-max98360a-1mic"; + + audio-routing =3D + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "AMIC1", "MIC BIAS1", + "AMIC2", "MIC BIAS2", + "VA DMIC0", "MIC BIAS3", + "VA DMIC1", "MIC BIAS3", + "VA DMIC2", "MIC BIAS1", + "VA DMIC3", "MIC BIAS1", + "TX SWR_ADC0", "ADC1_OUTPUT", + "TX SWR_ADC1", "ADC2_OUTPUT", + "TX SWR_ADC2", "ADC3_OUTPUT", + "TX SWR_DMIC0", "DMIC1_OUTPUT", + "TX SWR_DMIC1", "DMIC2_OUTPUT", + "TX SWR_DMIC2", "DMIC3_OUTPUT", + "TX SWR_DMIC3", "DMIC4_OUTPUT", + "TX SWR_DMIC4", "DMIC5_OUTPUT", + "TX SWR_DMIC5", "DMIC6_OUTPUT", + "TX SWR_DMIC6", "DMIC7_OUTPUT", + "TX SWR_DMIC7", "DMIC8_OUTPUT"; + + qcom,msm-mbhc-hphl-swh =3D <1>; + qcom,msm-mbhc-gnd-swh =3D <1>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + #sound-dai-cells =3D <0>; + + dai-link@1 { + link-name =3D "MAX98360A"; + reg =3D ; + cpu { + sound-dai =3D <&lpass_cpu MI2S_SECONDARY>; + }; + + codec { + sound-dai =3D <&max98360a>; + }; + }; + + dai-link@5 { + link-name =3D "DisplayPort"; + reg =3D ; + cpu { + sound-dai =3D <&lpass_cpu LPASS_DP_RX>; + }; + + codec { + sound-dai =3D <&mdss_dp>; + }; + }; + + dai-link@6 { + link-name =3D "WCD9385 Playback"; + reg =3D ; + cpu { + sound-dai =3D <&lpass_cpu LPASS_CDC_DMA_RX0>; + }; + + codec { + sound-dai =3D <&wcd938x 0>, <&swr0 0>, <&lpass_rx_macro 0>; + }; + }; + + dai-link@19 { + link-name =3D "WCD9385 Capture"; + reg =3D ; + cpu { + sound-dai =3D <&lpass_cpu LPASS_CDC_DMA_TX3>; + }; + + codec { + sound-dai =3D <&wcd938x 1>, <&swr1 0>, <&lpass_tx_macro 0>; + }; + }; + + dai-link@25 { + link-name =3D "DMIC"; + reg =3D ; + cpu { + sound-dai =3D <&lpass_cpu LPASS_CDC_DMA_VA_TX0>; + }; + + codec { + sound-dai =3D <&lpass_va_macro 0>; + }; + }; + }; }; =20 &apps_rsc { --=20 2.7.4