From nobody Mon Jun 22 19:22:47 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA4B0C433F5 for ; Fri, 18 Mar 2022 09:51:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234655AbiCRJwa (ORCPT ); Fri, 18 Mar 2022 05:52:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38708 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229941AbiCRJw2 (ORCPT ); Fri, 18 Mar 2022 05:52:28 -0400 Received: from 189.cn (ptr.189.cn [183.61.185.104]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 5786B178686; Fri, 18 Mar 2022 02:51:09 -0700 (PDT) HMM_SOURCE_IP: 10.64.8.31:36022.1773867350 HMM_ATTACHE_NUM: 0000 HMM_SOURCE_TYPE: SMTP Received: from clientip-123.150.8.43 (unknown [10.64.8.31]) by 189.cn (HERMES) with SMTP id 2ABC21001B4; Fri, 18 Mar 2022 17:51:06 +0800 (CST) Received: from ([123.150.8.43]) by gateway-153622-dep-749df8664c-cv9r2 with ESMTP id 374a5bf189884f2aa252180a3e8c7832 for johan@kernel.org; Fri, 18 Mar 2022 17:51:08 CST X-Transaction-ID: 374a5bf189884f2aa252180a3e8c7832 X-Real-From: chensong_2000@189.cn X-Receive-IP: 123.150.8.43 X-MEDUSA-Status: 0 Sender: chensong_2000@189.cn From: Song Chen To: johan@kernel.org, elder@kernel.org, gregkh@linuxfoundation.org, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de, lee.jones@linaro.org, greybus-dev@lists.linaro.org, linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org, elder@ieee.org, elder@linaro.org Cc: Song Chen Subject: [PATCH v6] staging: greybus: introduce pwm_ops::apply Date: Fri, 18 Mar 2022 17:57:12 +0800 Message-Id: <1647597432-27586-1-git-send-email-chensong_2000@189.cn> X-Mailer: git-send-email 2.7.4 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Introduce newer .apply function in pwm_ops to replace legacy operations including enable, disable, config and set_polarity. This guarantees atomic changes of the pwm controller configuration. Signed-off-by: Song Chen Reviewed-by: Alex Elder --- v2: 1, define duty_cycle and period as u64 in gb_pwm_config_operation. 2, define duty and period as u64 in gb_pwm_config_request. 3, disable before configuring duty and period if the eventual goal is a disabled state. v3: Regarding duty_cycle and period, I read more discussion in this thread, min, warn or -EINVAL, seems no perfect way acceptable for everyone. How about we limit their value to INT_MAX and throw a warning at the same time when they are wrong? v4: 1, explain why legacy operations are replaced. 2, cap the value of period and duty to U32_MAX. v5: 1, revise commit message. v6: 1, revise commit message. 2, explain why capping the value of period and duty to U32_MAX in comment. --- drivers/staging/greybus/pwm.c | 64 ++++++++++++++++++++++------------- 1 file changed, 40 insertions(+), 24 deletions(-) diff --git a/drivers/staging/greybus/pwm.c b/drivers/staging/greybus/pwm.c index 891a6a672378..ad20ec24031e 100644 --- a/drivers/staging/greybus/pwm.c +++ b/drivers/staging/greybus/pwm.c @@ -204,43 +204,59 @@ static void gb_pwm_free(struct pwm_chip *chip, struct= pwm_device *pwm) gb_pwm_deactivate_operation(pwmc, pwm->hwpwm); } =20 -static int gb_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, - int duty_ns, int period_ns) +static int gb_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, + const struct pwm_state *state) { + int err; + bool enabled =3D pwm->state.enabled; + u64 period =3D state->period; + u64 duty_cycle =3D state->duty_cycle; struct gb_pwm_chip *pwmc =3D pwm_chip_to_gb_pwm_chip(chip); =20 - return gb_pwm_config_operation(pwmc, pwm->hwpwm, duty_ns, period_ns); -}; + /* Set polarity */ + if (state->polarity !=3D pwm->state.polarity) { + if (enabled) { + gb_pwm_disable_operation(pwmc, pwm->hwpwm); + enabled =3D false; + } + err =3D gb_pwm_set_polarity_operation(pwmc, pwm->hwpwm, state->polarity); + if (err) + return err; + } =20 -static int gb_pwm_set_polarity(struct pwm_chip *chip, struct pwm_device *p= wm, - enum pwm_polarity polarity) -{ - struct gb_pwm_chip *pwmc =3D pwm_chip_to_gb_pwm_chip(chip); + if (!state->enabled) { + if (enabled) + gb_pwm_disable_operation(pwmc, pwm->hwpwm); + return 0; + } =20 - return gb_pwm_set_polarity_operation(pwmc, pwm->hwpwm, polarity); -}; + /* + * Set period and duty cycle + * + * PWM privodes 64-bit period and duty_cycle, but greybus only accepts + * 32-bit, so their values have to be limited to U32_MAX. + */ + if (period > U32_MAX) + period =3D U32_MAX; =20 -static int gb_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) -{ - struct gb_pwm_chip *pwmc =3D pwm_chip_to_gb_pwm_chip(chip); + if (duty_cycle > period) + duty_cycle =3D period; =20 - return gb_pwm_enable_operation(pwmc, pwm->hwpwm); -}; + err =3D gb_pwm_config_operation(pwmc, pwm->hwpwm, duty_cycle, period); + if (err) + return err; =20 -static void gb_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) -{ - struct gb_pwm_chip *pwmc =3D pwm_chip_to_gb_pwm_chip(chip); + /* enable/disable */ + if (!enabled) + return gb_pwm_enable_operation(pwmc, pwm->hwpwm); =20 - gb_pwm_disable_operation(pwmc, pwm->hwpwm); -}; + return 0; +} =20 static const struct pwm_ops gb_pwm_ops =3D { .request =3D gb_pwm_request, .free =3D gb_pwm_free, - .config =3D gb_pwm_config, - .set_polarity =3D gb_pwm_set_polarity, - .enable =3D gb_pwm_enable, - .disable =3D gb_pwm_disable, + .apply =3D gb_pwm_apply, .owner =3D THIS_MODULE, }; =20 --=20 2.25.1