From nobody Tue Jun 23 07:08:56 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB819C433EF for ; Wed, 9 Mar 2022 07:56:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230314AbiCIH5C (ORCPT ); Wed, 9 Mar 2022 02:57:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51028 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230490AbiCIH40 (ORCPT ); Wed, 9 Mar 2022 02:56:26 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6E6A6164D09; Tue, 8 Mar 2022 23:55:02 -0800 (PST) Date: Wed, 09 Mar 2022 07:54:59 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1646812500; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=aZ+UBUKYi6DeNxObVlYgBQZJX9E6SdjlzG1BqArFWUA=; b=mIGr+HxM5QaAkFXMm0np/LmyBoR+qGomO8j5PzxaCngZnXJBy6HdhvEyGhLAGGwB78kOfV GFJK07rLRA28S2UmxEoqyN2dUb72O8XLc1dzVpE2TnQZ2AEZkh8g9AnIgnhXYDhpz0YZRa tmE/fMbvvy6LanW7ZmTori5m8MTh163Rr2pOCISDGmKHDMBrwQs+7siNjSI1YUx/Z25UmG rO70Uu0+djWMSAMN7FOPfPYPvBjKuxP5dm7P+lkD/E8bTl6B44OMLbZnhQPDGGJpNElQ/r 5Lj+DETxrVGfCGwC+DuH8Lv/U61HUgQW1y9B5W4QmWph4fxPScbc+Qc5D2lhhg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1646812500; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=aZ+UBUKYi6DeNxObVlYgBQZJX9E6SdjlzG1BqArFWUA=; b=e5WVBiUIliIFxIpgIOO3eEwKGUkGEg1rt3pwFskY8SOjeCQEM0oiS9o4QjSXXWTFO/Sq46 ITYlrb8LQdBE7qDA== From: "tip-bot2 for Peter Zijlstra" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/core] x86/ibt,bpf: Add ENDBR instructions to prologue and trampoline Cc: "Peter Zijlstra (Intel)" , Josh Poimboeuf , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20220308154318.464998838@infradead.org> References: <20220308154318.464998838@infradead.org> MIME-Version: 1.0 Message-ID: <164681249965.16921.9515678976322080671.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the x86/core branch of tip: Commit-ID: 2f6f7bf13ab67330390bb19afe605dc2abfe726b Gitweb: https://git.kernel.org/tip/2f6f7bf13ab67330390bb19afe605dc2a= bfe726b Author: Peter Zijlstra AuthorDate: Tue, 08 Mar 2022 16:30:33 +01:00 Committer: Peter Zijlstra CommitterDate: Tue, 08 Mar 2022 23:53:32 +01:00 x86/ibt,bpf: Add ENDBR instructions to prologue and trampoline With IBT enabled builds we need ENDBR instructions at indirect jump target sites, since we start execution of the JIT'ed code through an indirect jump, the very first instruction needs to be ENDBR. Similarly, since eBPF tail-calls use indirect branches, their landing site needs to be an ENDBR too. The trampolines need similar adjustment. Signed-off-by: Peter Zijlstra (Intel) Acked-by: Josh Poimboeuf Link: https://lore.kernel.org/r/20220308154318.464998838@infradead.org --- arch/x86/net/bpf_jit_comp.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c index 2b1e266..159b79f 100644 --- a/arch/x86/net/bpf_jit_comp.c +++ b/arch/x86/net/bpf_jit_comp.c @@ -46,6 +46,12 @@ static u8 *emit_code(u8 *ptr, u32 bytes, unsigned int le= n) #define EMIT4_off32(b1, b2, b3, b4, off) \ do { EMIT4(b1, b2, b3, b4); EMIT(off, 4); } while (0) =20 +#ifdef CONFIG_X86_KERNEL_IBT +#define EMIT_ENDBR() EMIT(gen_endbr(), 4) +#else +#define EMIT_ENDBR() +#endif + static bool is_imm8(int value) { return value <=3D 127 && value >=3D -128; @@ -241,7 +247,7 @@ struct jit_context { /* Number of bytes emit_patch() needs to generate instructions */ #define X86_PATCH_SIZE 5 /* Number of bytes that will be skipped on tailcall */ -#define X86_TAIL_CALL_OFFSET 11 +#define X86_TAIL_CALL_OFFSET (11 + ENDBR_INSN_SIZE) =20 static void push_callee_regs(u8 **pprog, bool *callee_regs_used) { @@ -286,6 +292,7 @@ static void emit_prologue(u8 **pprog, u32 stack_depth, = bool ebpf_from_cbpf, /* BPF trampoline can be made to work without these nops, * but let's waste 5 bytes for now and optimize later */ + EMIT_ENDBR(); memcpy(prog, x86_nops[5], X86_PATCH_SIZE); prog +=3D X86_PATCH_SIZE; if (!ebpf_from_cbpf) { @@ -296,6 +303,10 @@ static void emit_prologue(u8 **pprog, u32 stack_depth,= bool ebpf_from_cbpf, } EMIT1(0x55); /* push rbp */ EMIT3(0x48, 0x89, 0xE5); /* mov rbp, rsp */ + + /* X86_TAIL_CALL_OFFSET is here */ + EMIT_ENDBR(); + /* sub rsp, rounded_stack_depth */ if (stack_depth) EMIT3_off32(0x48, 0x81, 0xEC, round_up(stack_depth, 8)); @@ -2028,10 +2039,11 @@ int arch_prepare_bpf_trampoline(struct bpf_tramp_im= age *im, void *image, void *i /* skip patched call instruction and point orig_call to actual * body of the kernel function. */ - orig_call +=3D X86_PATCH_SIZE; + orig_call +=3D X86_PATCH_SIZE + ENDBR_INSN_SIZE; =20 prog =3D image; =20 + EMIT_ENDBR(); EMIT1(0x55); /* push rbp */ EMIT3(0x48, 0x89, 0xE5); /* mov rbp, rsp */ EMIT4(0x48, 0x83, 0xEC, stack_size); /* sub rsp, stack_size */