From nobody Tue Jun 23 16:16:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD1D9C433EF for ; Wed, 2 Mar 2022 13:04:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242102AbiCBNFT (ORCPT ); Wed, 2 Mar 2022 08:05:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38950 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242044AbiCBNE7 (ORCPT ); Wed, 2 Mar 2022 08:04:59 -0500 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 47020C2483; Wed, 2 Mar 2022 05:04:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1646226256; x=1677762256; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=zRkmD/3/0Ciauk5yzlPVMvJbgpl1+ykhnwt0BbO+vNA=; b=rsesroQ9HOmnLBiIjdqwcSobuBDd0OSvefEVU+IV7c4lh7jezOt1UI3a fQtn+b8KCChIZMEN4WABEjpJ2iLpbGO6oXzbc6Fhv3IMxuqv4U6JqVbuF y/xv8U9OhLpp0sd1KStxzA5Lg+OaV1K3QMOZa1EMzdZprIBNSydm0PM+t Q=; Received: from ironmsg07-lv.qualcomm.com ([10.47.202.151]) by alexa-out.qualcomm.com with ESMTP; 02 Mar 2022 05:04:16 -0800 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg07-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 02 Mar 2022 05:04:14 -0800 X-QCInternal: smtphost Received: from c-sbhanu-linux.qualcomm.com ([10.242.50.201]) by ironmsg02-blr.qualcomm.com with ESMTP; 02 Mar 2022 18:33:52 +0530 Received: by c-sbhanu-linux.qualcomm.com (Postfix, from userid 2344807) id 39B36587B; Wed, 2 Mar 2022 18:33:51 +0530 (IST) From: Shaik Sajida Bhanu To: adrian.hunter@intel.com, quic_riteshh@quicinc.com, asutoshd@quicinc.com, ulf.hansson@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, linux-mmc@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: quic_vbadigan@quicinc.com, quic_rampraka@quicinc.com, quic_pragalla@quicinc.com, quic_sartgarg@quicinc.com, quic_nitirawa@quicinc.com, quic_sayalil@quicinc.com, Shaik Sajida Bhanu , Liangliang Lu , "Bao D . Nguyen" Subject: [PATCH V4 1/7] mmc: core: Capture eMMC and SD card errors Date: Wed, 2 Mar 2022 18:33:41 +0530 Message-Id: <1646226227-32429-2-git-send-email-quic_c_sbhanu@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1646226227-32429-1-git-send-email-quic_c_sbhanu@quicinc.com> References: <1646226227-32429-1-git-send-email-quic_c_sbhanu@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add changes to capture eMMC and SD card errors. This is useful for debug and testing. Signed-off-by: Liangliang Lu Signed-off-by: Sayali Lokhande Signed-off-by: Bao D. Nguyen Signed-off-by: Ram Prakash Gupta Signed-off-by: Shaik Sajida Bhanu --- drivers/mmc/core/core.c | 6 ++++++ include/linux/mmc/host.h | 23 +++++++++++++++++++++++ 2 files changed, 29 insertions(+) diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index 368f104..f3679ed 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -2242,6 +2242,12 @@ void mmc_rescan(struct work_struct *work) if (freqs[i] <=3D host->f_min) break; } + + /* + * Ignore the command timeout errors observed during + * the card init as those are excepted. + */ + host->err_stats[MMC_ERR_CMD_TIMEOUT] =3D 0; mmc_release_host(host); =20 out: diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 7afb57c..3b7f1e5 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -93,6 +93,23 @@ struct mmc_clk_phase_map { =20 struct mmc_host; =20 +enum mmc_err_stat { + MMC_ERR_CMD_TIMEOUT, + MMC_ERR_CMD_CRC, + MMC_ERR_DAT_TIMEOUT, + MMC_ERR_DAT_CRC, + MMC_ERR_AUTO_CMD, + MMC_ERR_ADMA, + MMC_ERR_TUNING, + MMC_ERR_CMDQ_RED, + MMC_ERR_CMDQ_GCE, + MMC_ERR_CMDQ_ICCE, + MMC_ERR_REQ_TIMEOUT, + MMC_ERR_CMDQ_REQ_TIMEOUT, + MMC_ERR_ICE_CFG, + MMC_ERR_MAX, +}; + struct mmc_host_ops { /* * It is optional for the host to implement pre_req and post_req in @@ -500,6 +517,7 @@ struct mmc_host { =20 /* Host Software Queue support */ bool hsq_enabled; + u32 err_stats[MMC_ERR_MAX]; =20 unsigned long private[] ____cacheline_aligned; }; @@ -635,6 +653,11 @@ static inline enum dma_data_direction mmc_get_dma_dir(= struct mmc_data *data) return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE; } =20 +static inline void mmc_debugfs_err_stats_inc(struct mmc_host *host, + enum mmc_err_stat stat) { + host->err_stats[stat] +=3D 1; +} + int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error); int mmc_send_abort_tuning(struct mmc_host *host, u32 opcode); int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd); --=20 QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member=20 of Code Aurora Forum, hosted by The Linux Foundation From nobody Tue Jun 23 16:16:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7BC7C433F5 for ; Wed, 2 Mar 2022 13:04:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242072AbiCBNFR (ORCPT ); Wed, 2 Mar 2022 08:05:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38918 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242040AbiCBNE6 (ORCPT ); Wed, 2 Mar 2022 08:04:58 -0500 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2365BC2E40; Wed, 2 Mar 2022 05:04:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1646226255; x=1677762255; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=4sywxk01cEBaroiqrhseZzU7BYxb6vKODGzjJcoNpM4=; b=R2VBqqSz7t6L/7wzFSfaDrUFVep1j6Wr3eZoNHCJ884MM0DktN+kmgso +ioaPMSqI/h9zSjBz/z8RkbS5Wn6Vuck/+TkvQt+n98ZNkjifcgpQv7ak TH8ayBoKnXqUvwqycQQinkt+OnPfIyDSz5nALASOMvtIX+rd6WTsgWfrg k=; Received: from ironmsg-lv-alpha.qualcomm.com ([10.47.202.13]) by alexa-out.qualcomm.com with ESMTP; 02 Mar 2022 05:04:14 -0800 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg-lv-alpha.qualcomm.com with ESMTP/TLS/AES256-SHA; 02 Mar 2022 05:04:13 -0800 X-QCInternal: smtphost Received: from c-sbhanu-linux.qualcomm.com ([10.242.50.201]) by ironmsg02-blr.qualcomm.com with ESMTP; 02 Mar 2022 18:33:53 +0530 Received: by c-sbhanu-linux.qualcomm.com (Postfix, from userid 2344807) id B235E5881; Wed, 2 Mar 2022 18:33:52 +0530 (IST) From: Shaik Sajida Bhanu To: adrian.hunter@intel.com, quic_riteshh@quicinc.com, asutoshd@quicinc.com, ulf.hansson@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, linux-mmc@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: quic_vbadigan@quicinc.com, quic_rampraka@quicinc.com, quic_pragalla@quicinc.com, quic_sartgarg@quicinc.com, quic_nitirawa@quicinc.com, quic_sayalil@quicinc.com, Shaik Sajida Bhanu , Liangliang Lu , "Bao D . Nguyen" Subject: [PATCH V4 2/7] mmc: sdhci: Capture eMMC and SD card errors Date: Wed, 2 Mar 2022 18:33:42 +0530 Message-Id: <1646226227-32429-3-git-send-email-quic_c_sbhanu@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1646226227-32429-1-git-send-email-quic_c_sbhanu@quicinc.com> References: <1646226227-32429-1-git-send-email-quic_c_sbhanu@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add changes to capture eMMC and SD card errors. This is useful for debug and testing. Signed-off-by: Liangliang Lu Signed-off-by: Sayali Lokhande Signed-off-by: Bao D. Nguyen Signed-off-by: Shaik Sajida Bhanu --- drivers/mmc/host/sdhci.c | 52 +++++++++++++++++++++++++++++++++++++-------= ---- 1 file changed, 40 insertions(+), 12 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 07c6da1..741fb06 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -3159,6 +3159,7 @@ static void sdhci_timeout_timer(struct timer_list *t) spin_lock_irqsave(&host->lock, flags); =20 if (host->cmd && !sdhci_data_line_cmd(host->cmd)) { + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_REQ_TIMEOUT); pr_err("%s: Timeout waiting for hardware cmd interrupt.\n", mmc_hostname(host->mmc)); sdhci_dumpregs(host); @@ -3181,6 +3182,7 @@ static void sdhci_timeout_data_timer(struct timer_lis= t *t) =20 if (host->data || host->data_cmd || (host->cmd && sdhci_data_line_cmd(host->cmd))) { + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_REQ_TIMEOUT); pr_err("%s: Timeout waiting for hardware interrupt.\n", mmc_hostname(host->mmc)); sdhci_dumpregs(host); @@ -3240,11 +3242,15 @@ static void sdhci_cmd_irq(struct sdhci_host *host, = u32 intmask, u32 *intmask_p) =20 if (intmask & (SDHCI_INT_TIMEOUT | SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX)) { - if (intmask & SDHCI_INT_TIMEOUT) + if (intmask & SDHCI_INT_TIMEOUT) { host->cmd->error =3D -ETIMEDOUT; - else + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_CMD_TIMEOUT); + } else { host->cmd->error =3D -EILSEQ; - + if (host->cmd->opcode !=3D MMC_SEND_TUNING_BLOCK || + host->cmd->opcode !=3D MMC_SEND_TUNING_BLOCK_HS200) + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_CMD_CRC); + } /* Treat data command CRC error the same as data CRC error */ if (host->cmd->data && (intmask & (SDHCI_INT_CRC | SDHCI_INT_TIMEOUT)) =3D=3D @@ -3265,6 +3271,7 @@ static void sdhci_cmd_irq(struct sdhci_host *host, u3= 2 intmask, u32 *intmask_p) int err =3D (auto_cmd_status & SDHCI_AUTO_CMD_TIMEOUT) ? -ETIMEDOUT : -EILSEQ; + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_AUTO_CMD); =20 if (sdhci_auto_cmd23(host, mrq)) { mrq->sbc->error =3D err; @@ -3342,6 +3349,7 @@ static void sdhci_data_irq(struct sdhci_host *host, u= 32 intmask) if (intmask & SDHCI_INT_DATA_TIMEOUT) { host->data_cmd =3D NULL; data_cmd->error =3D -ETIMEDOUT; + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_CMD_TIMEOUT); __sdhci_finish_mrq(host, data_cmd->mrq); return; } @@ -3375,18 +3383,25 @@ static void sdhci_data_irq(struct sdhci_host *host,= u32 intmask) return; } =20 - if (intmask & SDHCI_INT_DATA_TIMEOUT) + if (intmask & SDHCI_INT_DATA_TIMEOUT) { host->data->error =3D -ETIMEDOUT; + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_DAT_TIMEOUT); + } else if (intmask & SDHCI_INT_DATA_END_BIT) host->data->error =3D -EILSEQ; else if ((intmask & SDHCI_INT_DATA_CRC) && SDHCI_GET_CMD(sdhci_readw(host, SDHCI_COMMAND)) - !=3D MMC_BUS_TEST_R) + !=3D MMC_BUS_TEST_R) { host->data->error =3D -EILSEQ; + if (host->cmd->opcode !=3D MMC_SEND_TUNING_BLOCK || + host->cmd->opcode !=3D MMC_SEND_TUNING_BLOCK_HS200) + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_DAT_CRC); + } else if (intmask & SDHCI_INT_ADMA_ERROR) { pr_err("%s: ADMA error: 0x%08x\n", mmc_hostname(host->mmc), intmask); sdhci_adma_show_error(host); + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_ADMA); host->data->error =3D -EIO; if (host->ops->adma_workaround) host->ops->adma_workaround(host, intmask); @@ -3905,20 +3920,33 @@ bool sdhci_cqe_irq(struct sdhci_host *host, u32 int= mask, int *cmd_error, if (!host->cqe_on) return false; =20 - if (intmask & (SDHCI_INT_INDEX | SDHCI_INT_END_BIT | SDHCI_INT_CRC)) + if (intmask & (SDHCI_INT_INDEX | SDHCI_INT_END_BIT | SDHCI_INT_CRC)) { *cmd_error =3D -EILSEQ; - else if (intmask & SDHCI_INT_TIMEOUT) + if (intmask & SDHCI_INT_CRC) { + if (host->cmd->opcode !=3D MMC_SEND_TUNING_BLOCK || + host->cmd->opcode !=3D MMC_SEND_TUNING_BLOCK_HS200) + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_CMD_CRC); + } + } else if (intmask & SDHCI_INT_TIMEOUT) { *cmd_error =3D -ETIMEDOUT; - else + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_CMD_TIMEOUT); + } else *cmd_error =3D 0; =20 - if (intmask & (SDHCI_INT_DATA_END_BIT | SDHCI_INT_DATA_CRC)) + if (intmask & (SDHCI_INT_DATA_END_BIT | SDHCI_INT_DATA_CRC)) { *data_error =3D -EILSEQ; - else if (intmask & SDHCI_INT_DATA_TIMEOUT) + if (intmask & SDHCI_INT_DATA_CRC) { + if (host->cmd->opcode !=3D MMC_SEND_TUNING_BLOCK || + host->cmd->opcode !=3D MMC_SEND_TUNING_BLOCK_HS200) + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_DAT_CRC); + } + } else if (intmask & SDHCI_INT_DATA_TIMEOUT) { *data_error =3D -ETIMEDOUT; - else if (intmask & SDHCI_INT_ADMA_ERROR) + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_DAT_TIMEOUT); + } else if (intmask & SDHCI_INT_ADMA_ERROR) { *data_error =3D -EIO; - else + mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_ADMA); + } else *data_error =3D 0; =20 /* Clear selected interrupts. */ --=20 QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member=20 of Code Aurora Forum, hosted by The Linux Foundation From nobody Tue Jun 23 16:16:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 63267C4321E for ; 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02 Mar 2022 05:04:11 -0800 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg-lv-alpha.qualcomm.com with ESMTP/TLS/AES256-SHA; 02 Mar 2022 05:04:09 -0800 X-QCInternal: smtphost Received: from c-sbhanu-linux.qualcomm.com ([10.242.50.201]) by ironmsg02-blr.qualcomm.com with ESMTP; 02 Mar 2022 18:33:54 +0530 Received: by c-sbhanu-linux.qualcomm.com (Postfix, from userid 2344807) id E9ACA587B; Wed, 2 Mar 2022 18:33:53 +0530 (IST) From: Shaik Sajida Bhanu To: adrian.hunter@intel.com, quic_riteshh@quicinc.com, asutoshd@quicinc.com, ulf.hansson@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, linux-mmc@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: quic_vbadigan@quicinc.com, quic_rampraka@quicinc.com, quic_pragalla@quicinc.com, quic_sartgarg@quicinc.com, quic_nitirawa@quicinc.com, quic_sayalil@quicinc.com, Shaik Sajida Bhanu , Liangliang Lu , "Bao D . Nguyen" Subject: [PATCH V4 3/7] mmc: debugfs: Add debug fs entry for mmc driver Date: Wed, 2 Mar 2022 18:33:43 +0530 Message-Id: <1646226227-32429-4-git-send-email-quic_c_sbhanu@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1646226227-32429-1-git-send-email-quic_c_sbhanu@quicinc.com> References: <1646226227-32429-1-git-send-email-quic_c_sbhanu@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add debug fs entry to query eMMC and SD card errors statistics Signed-off-by: Liangliang Lu Signed-off-by: Sayali Lokhande Signed-off-by: Bao D. Nguyen Signed-off-by: Shaik Sajida Bhanu --- drivers/mmc/core/debugfs.c | 60 ++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 60 insertions(+) diff --git a/drivers/mmc/core/debugfs.c b/drivers/mmc/core/debugfs.c index 3fdbc80..db0988c 100644 --- a/drivers/mmc/core/debugfs.c +++ b/drivers/mmc/core/debugfs.c @@ -223,6 +223,63 @@ static int mmc_clock_opt_set(void *data, u64 val) DEFINE_DEBUGFS_ATTRIBUTE(mmc_clock_fops, mmc_clock_opt_get, mmc_clock_opt_= set, "%llu\n"); =20 +static int mmc_err_stats_show(struct seq_file *file, void *data) +{ + struct mmc_host *host =3D (struct mmc_host *)file->private; + const char *desc[MMC_ERR_MAX] =3D { + [MMC_ERR_CMD_TIMEOUT] =3D "Command Timeout Occurred", + [MMC_ERR_CMD_CRC] =3D "Command CRC Errors Occurred", + [MMC_ERR_DAT_TIMEOUT] =3D "Data Timeout Occurred", + [MMC_ERR_DAT_CRC] =3D "Data CRC Errors Occurred", + [MMC_ERR_AUTO_CMD] =3D "Auto-Cmd Error Occurred", + [MMC_ERR_ADMA] =3D "ADMA Error Occurred", + [MMC_ERR_TUNING] =3D "Tuning Error Occurred", + [MMC_ERR_CMDQ_RED] =3D "CMDQ RED Errors", + [MMC_ERR_CMDQ_GCE] =3D "CMDQ GCE Errors", + [MMC_ERR_CMDQ_ICCE] =3D "CMDQ ICCE Errors", + [MMC_ERR_REQ_TIMEOUT] =3D "Request Timedout", + [MMC_ERR_CMDQ_REQ_TIMEOUT] =3D "CMDQ Request Timedout", + [MMC_ERR_ICE_CFG] =3D "ICE Config Errors", + }; + int i; + + if (!host) + return -EINVAL; + + for (i =3D 0; i < MMC_ERR_MAX; i++) { + if (desc[i]) + seq_printf(file, "# %s:\t %d\n", + desc[i], host->err_stats[i]); + } + + return 0; +} + +static int mmc_err_stats_open(struct inode *inode, struct file *file) +{ + return single_open(file, mmc_err_stats_show, inode->i_private); +} + +static ssize_t mmc_err_stats_write(struct file *filp, const char __user *u= buf, + size_t cnt, loff_t *ppos) +{ + struct mmc_host *host =3D filp->f_mapping->host->i_private; + + if (!host) + return -EINVAL; + + pr_debug("%s: Resetting MMC error statistics\n", __func__); + memset(host->err_stats, 0, sizeof(host->err_stats)); + + return cnt; +} + +static const struct file_operations mmc_err_stats_fops =3D { + .open =3D mmc_err_stats_open, + .read =3D seq_read, + .write =3D mmc_err_stats_write, +}; + void mmc_add_host_debugfs(struct mmc_host *host) { struct dentry *root; @@ -236,6 +293,9 @@ void mmc_add_host_debugfs(struct mmc_host *host) debugfs_create_file_unsafe("clock", S_IRUSR | S_IWUSR, root, host, &mmc_clock_fops); =20 + debugfs_create_file("err_stats", 0600, root, host, + &mmc_err_stats_fops); + #ifdef CONFIG_FAIL_MMC_REQUEST if (fail_request) setup_fault_attr(&fail_default_attr, fail_request); --=20 QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member=20 of Code Aurora Forum, hosted by The Linux Foundation From nobody Tue Jun 23 16:16:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3777AC433EF for ; Wed, 2 Mar 2022 13:04:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236890AbiCBNFO (ORCPT ); Wed, 2 Mar 2022 08:05:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38846 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242035AbiCBNE5 (ORCPT ); Wed, 2 Mar 2022 08:04:57 -0500 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B446BC334B; Wed, 2 Mar 2022 05:04:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1646226255; x=1677762255; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=Ei9xZmq+zF939bmO9VvFSVHK064S9yezB1LXtbk8v3g=; b=iPp9oQWR8fMPAmS7XBS1t3Bgpglx+GZ3PKHSfZQyZJQsFRDcx5G9B1ZM JKSJuXk2LpAIrp969WmM9lrnyXfM4XjULqOLkzV6L1XYGbKKaq9v51anu pkFcoetCgSQEUr6y09Oq7apO/Er6CDUWrZDegha6wcvopWcThSvb9A9MY U=; Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 02 Mar 2022 05:04:14 -0800 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 02 Mar 2022 05:04:13 -0800 X-QCInternal: smtphost Received: from c-sbhanu-linux.qualcomm.com ([10.242.50.201]) by ironmsg02-blr.qualcomm.com with ESMTP; 02 Mar 2022 18:33:56 +0530 Received: by c-sbhanu-linux.qualcomm.com (Postfix, from userid 2344807) id 807EC587B; Wed, 2 Mar 2022 18:33:55 +0530 (IST) From: Shaik Sajida Bhanu To: adrian.hunter@intel.com, quic_riteshh@quicinc.com, asutoshd@quicinc.com, ulf.hansson@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, linux-mmc@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: quic_vbadigan@quicinc.com, quic_rampraka@quicinc.com, quic_pragalla@quicinc.com, quic_sartgarg@quicinc.com, quic_nitirawa@quicinc.com, quic_sayalil@quicinc.com, Shaik Sajida Bhanu , Liangliang Lu , "Bao D . Nguyen" Subject: [PATCH V4 4/7] mmc: debugfs: Add debug fs error state entry for mmc driver Date: Wed, 2 Mar 2022 18:33:44 +0530 Message-Id: <1646226227-32429-5-git-send-email-quic_c_sbhanu@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1646226227-32429-1-git-send-email-quic_c_sbhanu@quicinc.com> References: <1646226227-32429-1-git-send-email-quic_c_sbhanu@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add debug fs entry error state to query eMMC and SD card errors statistics. If any errors occurred in eMMC and SD card driver level then err_state value will be set to 1. Signed-off-by: Liangliang Lu Signed-off-by: Sayali Lokhande Signed-off-by: Bao D. Nguyen Signed-off-by: Shaik Sajida Bhanu --- drivers/mmc/core/debugfs.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/mmc/core/debugfs.c b/drivers/mmc/core/debugfs.c index db0988c..7d78eac 100644 --- a/drivers/mmc/core/debugfs.c +++ b/drivers/mmc/core/debugfs.c @@ -222,6 +222,19 @@ static int mmc_clock_opt_set(void *data, u64 val) =20 DEFINE_DEBUGFS_ATTRIBUTE(mmc_clock_fops, mmc_clock_opt_get, mmc_clock_opt_= set, "%llu\n"); +static int mmc_err_state_get(void *data, u64 *val) +{ + struct mmc_host *host =3D data; + + if (!host) + return -EINVAL; + + *val =3D host->err_state ? 1 : 0; + + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(mmc_err_state, mmc_err_state_get, NULL, "%llu\n"); =20 static int mmc_err_stats_show(struct seq_file *file, void *data) { @@ -293,6 +306,8 @@ void mmc_add_host_debugfs(struct mmc_host *host) debugfs_create_file_unsafe("clock", S_IRUSR | S_IWUSR, root, host, &mmc_clock_fops); =20 + debugfs_create_file("err_state", 0600, root, host, + &mmc_err_state); debugfs_create_file("err_stats", 0600, root, host, &mmc_err_stats_fops); =20 --=20 QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member=20 of Code Aurora Forum, hosted by The Linux Foundation From nobody Tue Jun 23 16:16:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B5DD4C433EF for ; Wed, 2 Mar 2022 13:04:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242073AbiCBNFM (ORCPT ); Wed, 2 Mar 2022 08:05:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242034AbiCBNE5 (ORCPT ); Wed, 2 Mar 2022 08:04:57 -0500 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 903FCC249E; Wed, 2 Mar 2022 05:04:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1646226255; x=1677762255; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=HZxY7+ZsrGw8oObNGY8X+cyJQXGArfCk6MTvsHYl7TY=; b=QT27cEtQTXNLa2RuougvwBHc+fOkYkoARx0rKAsmsQm7SfDpHfZXn4ae ms3wJdgEIXndWHpC/cX/IKS+sY8wKaut1MBDPGbfftZdD731j2uO72AJm WksoVduVPQp7GBnqY+bnnfuvtpBlsVV/k+NOChVWkc4DRlOjutkxHRF/N Q=; Received: from ironmsg07-lv.qualcomm.com ([10.47.202.151]) by alexa-out.qualcomm.com with ESMTP; 02 Mar 2022 05:04:14 -0800 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg07-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 02 Mar 2022 05:04:13 -0800 X-QCInternal: smtphost Received: from c-sbhanu-linux.qualcomm.com ([10.242.50.201]) by ironmsg02-blr.qualcomm.com with ESMTP; 02 Mar 2022 18:33:57 +0530 Received: by c-sbhanu-linux.qualcomm.com (Postfix, from userid 2344807) id C80A8587B; Wed, 2 Mar 2022 18:33:56 +0530 (IST) From: Shaik Sajida Bhanu To: adrian.hunter@intel.com, quic_riteshh@quicinc.com, asutoshd@quicinc.com, ulf.hansson@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, linux-mmc@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: quic_vbadigan@quicinc.com, quic_rampraka@quicinc.com, quic_pragalla@quicinc.com, quic_sartgarg@quicinc.com, quic_nitirawa@quicinc.com, quic_sayalil@quicinc.com, Shaik Sajida Bhanu , Liangliang Lu , "Bao D . Nguyen" Subject: [PATCH V4 5/7] mmc: core: Set error state for mmc driver Date: Wed, 2 Mar 2022 18:33:45 +0530 Message-Id: <1646226227-32429-6-git-send-email-quic_c_sbhanu@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1646226227-32429-1-git-send-email-quic_c_sbhanu@quicinc.com> References: <1646226227-32429-1-git-send-email-quic_c_sbhanu@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" If any errors observed in eMMC and SD card set error state. User can read error state value and confirm any errors observed or not, error state set means error obeserved and vice versa. Signed-off-by: Liangliang Lu Signed-off-by: Sayali Lokhande Signed-off-by: Bao D. Nguyen Signed-off-by: Ram Prakash Gupta Signed-off-by: Shaik Sajida Bhanu --- include/linux/mmc/host.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 3b7f1e5..28baa07 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -518,6 +518,7 @@ struct mmc_host { /* Host Software Queue support */ bool hsq_enabled; u32 err_stats[MMC_ERR_MAX]; + bool err_state; =20 unsigned long private[] ____cacheline_aligned; }; @@ -653,6 +654,11 @@ static inline enum dma_data_direction mmc_get_dma_dir(= struct mmc_data *data) return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE; } =20 +static inline void mmc_debugfs_err_stats_enable(struct mmc_host *host) +{ + host->err_state =3D true; +} + static inline void mmc_debugfs_err_stats_inc(struct mmc_host *host, enum mmc_err_stat stat) { host->err_stats[stat] +=3D 1; --=20 QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member=20 of Code Aurora Forum, hosted by The Linux Foundation From nobody Tue Jun 23 16:16:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A884C433EF for ; Wed, 2 Mar 2022 13:04:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242082AbiCBNFI (ORCPT ); Wed, 2 Mar 2022 08:05:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38704 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242029AbiCBNE4 (ORCPT ); Wed, 2 Mar 2022 08:04:56 -0500 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 16B6BC2E40; Wed, 2 Mar 2022 05:04:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1646226253; x=1677762253; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=0Pp6zzFaPm+z/5Swraj/qnkxiWNsONk0eUFF4PCYf9I=; b=DeaJQ/ZSf3MGwdCnVZPxwQop/Ce6oxziIrIxtmJrPyk32S9uDflwcuqA 5TYEOC3w8uXhO9yG9V481zhRgWXW2N/k5gZjFKtBdQZNO2jGdxUQN1BYu SMhasaAauui877Ll6OA+zGlm8zoayKGGpdKjTc4t5FYsF+bDB0ZCkd3P0 o=; Received: from ironmsg07-lv.qualcomm.com ([10.47.202.151]) by alexa-out.qualcomm.com with ESMTP; 02 Mar 2022 05:04:13 -0800 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg07-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 02 Mar 2022 05:04:11 -0800 X-QCInternal: smtphost Received: from c-sbhanu-linux.qualcomm.com ([10.242.50.201]) by ironmsg02-blr.qualcomm.com with ESMTP; 02 Mar 2022 18:33:59 +0530 Received: by c-sbhanu-linux.qualcomm.com (Postfix, from userid 2344807) id 424D8587E; Wed, 2 Mar 2022 18:33:58 +0530 (IST) From: Shaik Sajida Bhanu To: adrian.hunter@intel.com, quic_riteshh@quicinc.com, asutoshd@quicinc.com, ulf.hansson@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, linux-mmc@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: quic_vbadigan@quicinc.com, quic_rampraka@quicinc.com, quic_pragalla@quicinc.com, quic_sartgarg@quicinc.com, quic_nitirawa@quicinc.com, quic_sayalil@quicinc.com, Shaik Sajida Bhanu , Liangliang Lu , Sayali Lokhande , "Bao D . Nguyen" Subject: [PATCH V4 6/7] mmc: sdhci: Set error state for mmc driver Date: Wed, 2 Mar 2022 18:33:46 +0530 Message-Id: <1646226227-32429-7-git-send-email-quic_c_sbhanu@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1646226227-32429-1-git-send-email-quic_c_sbhanu@quicinc.com> References: <1646226227-32429-1-git-send-email-quic_c_sbhanu@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Set error state if any errors observed in eMMC and SD card driver level. Signed-off-by: Liangliang Lu Signed-off-by: Sayali Lokhande Signed-off-by: Bao D. Nguyen Signed-off-by: Ram Prakash Gupta Signed-off-by: Shaik Sajida Bhanu --- drivers/mmc/host/sdhci.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 741fb06..4ba3797 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -224,6 +224,8 @@ void sdhci_reset(struct sdhci_host *host, u8 mask) if (timedout) { pr_err("%s: Reset 0x%x never completed.\n", mmc_hostname(host->mmc), (int)mask); + if (host->mmc && !host->mmc->err_state) + mmc_debugfs_err_stats_enable(host->mmc); sdhci_dumpregs(host); return; } @@ -1716,6 +1718,8 @@ static bool sdhci_send_command_retry(struct sdhci_hos= t *host, if (!timeout--) { pr_err("%s: Controller never released inhibit bit(s).\n", mmc_hostname(host->mmc)); + if (host->mmc && !host->mmc->err_state) + mmc_debugfs_err_stats_enable(host->mmc); sdhci_dumpregs(host); cmd->error =3D -EIO; return false; @@ -1965,6 +1969,8 @@ void sdhci_enable_clk(struct sdhci_host *host, u16 cl= k) if (timedout) { pr_err("%s: Internal clock never stabilised.\n", mmc_hostname(host->mmc)); + if (host->mmc && !host->mmc->err_state) + mmc_debugfs_err_stats_enable(host->mmc); sdhci_dumpregs(host); return; } @@ -1987,6 +1993,8 @@ void sdhci_enable_clk(struct sdhci_host *host, u16 cl= k) if (timedout) { pr_err("%s: PLL clock never stabilised.\n", mmc_hostname(host->mmc)); + if (host->mmc && !host->mmc->err_state) + mmc_debugfs_err_stats_enable(host->mmc); sdhci_dumpregs(host); return; } @@ -3162,6 +3170,8 @@ static void sdhci_timeout_timer(struct timer_list *t) mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_REQ_TIMEOUT); pr_err("%s: Timeout waiting for hardware cmd interrupt.\n", mmc_hostname(host->mmc)); + if (host->mmc && !host->mmc->err_state) + mmc_debugfs_err_stats_enable(host->mmc); sdhci_dumpregs(host); =20 host->cmd->error =3D -ETIMEDOUT; @@ -3185,6 +3195,8 @@ static void sdhci_timeout_data_timer(struct timer_lis= t *t) mmc_debugfs_err_stats_inc(host->mmc, MMC_ERR_REQ_TIMEOUT); pr_err("%s: Timeout waiting for hardware interrupt.\n", mmc_hostname(host->mmc)); + if (host->mmc && !host->mmc->err_state) + mmc_debugfs_err_stats_enable(host->mmc); sdhci_dumpregs(host); =20 if (host->data) { @@ -3236,6 +3248,8 @@ static void sdhci_cmd_irq(struct sdhci_host *host, u3= 2 intmask, u32 *intmask_p) return; pr_err("%s: Got command interrupt 0x%08x even though no command operatio= n was in progress.\n", mmc_hostname(host->mmc), (unsigned)intmask); + if (host->mmc && !host->mmc->err_state) + mmc_debugfs_err_stats_enable(host->mmc); sdhci_dumpregs(host); return; } @@ -3289,6 +3303,8 @@ static void sdhci_adma_show_error(struct sdhci_host *= host) void *desc =3D host->adma_table; dma_addr_t dma =3D host->adma_addr; =20 + if (host->mmc && !host->mmc->err_state) + mmc_debugfs_err_stats_enable(host->mmc); sdhci_dumpregs(host); =20 while (true) { @@ -3378,6 +3394,8 @@ static void sdhci_data_irq(struct sdhci_host *host, u= 32 intmask) =20 pr_err("%s: Got data interrupt 0x%08x even though no data operation was = in progress.\n", mmc_hostname(host->mmc), (unsigned)intmask); + if (host->mmc && !host->mmc->err_state) + mmc_debugfs_err_stats_enable(host->mmc); sdhci_dumpregs(host); =20 return; @@ -3599,6 +3617,8 @@ static irqreturn_t sdhci_irq(int irq, void *dev_id) if (unexpected) { pr_err("%s: Unexpected interrupt 0x%08x.\n", mmc_hostname(host->mmc), unexpected); + if (host->mmc && !host->mmc->err_state) + mmc_debugfs_err_stats_enable(host->mmc); sdhci_dumpregs(host); } =20 @@ -3962,6 +3982,8 @@ bool sdhci_cqe_irq(struct sdhci_host *host, u32 intma= sk, int *cmd_error, sdhci_writel(host, intmask, SDHCI_INT_STATUS); pr_err("%s: CQE: Unexpected interrupt 0x%08x.\n", mmc_hostname(host->mmc), intmask); + if (host->mmc && !host->mmc->err_state) + mmc_debugfs_err_stats_enable(host->mmc); sdhci_dumpregs(host); } =20 --=20 QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member=20 of Code Aurora Forum, hosted by The Linux Foundation From nobody Tue Jun 23 16:16:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5418BC433EF for ; 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02 Mar 2022 05:04:13 -0800 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg-lv-alpha.qualcomm.com with ESMTP/TLS/AES256-SHA; 02 Mar 2022 05:04:11 -0800 X-QCInternal: smtphost Received: from c-sbhanu-linux.qualcomm.com ([10.242.50.201]) by ironmsg02-blr.qualcomm.com with ESMTP; 02 Mar 2022 18:34:00 +0530 Received: by c-sbhanu-linux.qualcomm.com (Postfix, from userid 2344807) id 85F38587B; Wed, 2 Mar 2022 18:33:59 +0530 (IST) From: Shaik Sajida Bhanu To: adrian.hunter@intel.com, quic_riteshh@quicinc.com, asutoshd@quicinc.com, ulf.hansson@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, linux-mmc@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: quic_vbadigan@quicinc.com, quic_rampraka@quicinc.com, quic_pragalla@quicinc.com, quic_sartgarg@quicinc.com, quic_nitirawa@quicinc.com, quic_sayalil@quicinc.com, Shaik Sajida Bhanu , Liangliang Lu , "Bao D . Nguyen" Subject: [PATCH V4 7/7] mmc: cqhci: Capture eMMC and SD card errors Date: Wed, 2 Mar 2022 18:33:47 +0530 Message-Id: <1646226227-32429-8-git-send-email-quic_c_sbhanu@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1646226227-32429-1-git-send-email-quic_c_sbhanu@quicinc.com> References: <1646226227-32429-1-git-send-email-quic_c_sbhanu@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add changes to capture eMMC and SD card errors. This is useful for debug and testing. Signed-off-by: Liangliang Lu Signed-off-by: Sayali Lokhande Signed-off-by: Bao D. Nguyen Signed-off-by: Ram Prakash Gupta Signed-off-by: Shaik Sajida Bhanu --- drivers/mmc/host/cqhci-core.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/cqhci-core.c b/drivers/mmc/host/cqhci-core.c index b0d30c3..b3d7d6d 100644 --- a/drivers/mmc/host/cqhci-core.c +++ b/drivers/mmc/host/cqhci-core.c @@ -822,8 +822,15 @@ irqreturn_t cqhci_irq(struct mmc_host *mmc, u32 intmas= k, int cmd_error, pr_debug("%s: cqhci: IRQ status: 0x%08x\n", mmc_hostname(mmc), status); =20 if ((status & (CQHCI_IS_RED | CQHCI_IS_GCE | CQHCI_IS_ICCE)) || - cmd_error || data_error) + cmd_error || data_error) { + if (status & CQHCI_IS_RED) + mmc_debugfs_err_stats_inc(mmc, MMC_ERR_CMDQ_RED); + if (status & CQHCI_IS_GCE) + mmc_debugfs_err_stats_inc(mmc, MMC_ERR_CMDQ_GCE); + if (status & CQHCI_IS_ICCE) + mmc_debugfs_err_stats_inc(mmc, MMC_ERR_CMDQ_ICCE); cqhci_error_irq(mmc, status, cmd_error, data_error); + } =20 if (status & CQHCI_IS_TCC) { /* read TCN and complete the request */ --=20 QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member=20 of Code Aurora Forum, hosted by The Linux Foundation