From nobody Tue Jun 30 09:25:00 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93F66C433F5 for ; Thu, 20 Jan 2022 09:55:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1359671AbiATJzU (ORCPT ); Thu, 20 Jan 2022 04:55:20 -0500 Received: from alexa-out.qualcomm.com ([129.46.98.28]:48355 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1359677AbiATJzS (ORCPT ); Thu, 20 Jan 2022 04:55:18 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1642672518; x=1674208518; h=from:to:cc:subject:date:message-id; bh=nehZ2/Kj/bi/H40TUSBt5PDmvxHq+7M7Ek53ZM5zGgo=; b=hDtnEWCz4UmJa+ekyE/tylVVBnMhO50krU0DUoaA0NMdbSoA+tmdgCMD YIgjUf10C3G8M6MdVNUYrE+92noj6Zd1SXk7UgaH+vgyIbrz7ykbIIC2S QdhZuYXhr2KZIzD/vhLv6JRl3aiJSiG16XgG77hS0reh/uCGeW7F7YFRv o=; Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 20 Jan 2022 01:55:17 -0800 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 20 Jan 2022 01:55:16 -0800 X-QCInternal: smtphost Received: from c-sbhanu-linux.qualcomm.com ([10.242.50.201]) by ironmsg02-blr.qualcomm.com with ESMTP; 20 Jan 2022 15:24:55 +0530 Received: by c-sbhanu-linux.qualcomm.com (Postfix, from userid 2344807) id 64610566F; Thu, 20 Jan 2022 15:24:54 +0530 (IST) From: Shaik Sajida Bhanu To: dianders@chromium.org, tudor.ambarus@microchip.com, michael@walle.cc, p.yadav@ti.com, miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: stummala@codeaurora.org, vbadigan@codeaurora.org, quic_rampraka@quicinc.com, quic_pragalla@quicinc.com, sartgarg@codeaurora.org, Shaik Sajida Bhanu Subject: [PATCH V4] mtd: spi-nor: winbond: Add support for winbond chip Date: Thu, 20 Jan 2022 15:24:51 +0530 Message-Id: <1642672491-30067-1-git-send-email-quic_c_sbhanu@quicinc.com> X-Mailer: git-send-email 2.7.4 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add support for winbond W25Q512NW-IM chip. Signed-off-by: Shaik Sajida Bhanu Reviewed-by: Doug Anderson --- Changes since V1: - Added space before name of the flash part as suggested by Doug. Changes since V2: - Updated chip name as w25q512nwm as suggested by Doug. Changes since V3: - Updated flash_info flags passing according to below patch https://lore.kernel.org/all/20211207140254.87681-7-tudor.ambarus@microchi= p.com/ As suggested by Tudor Ambarus. --- drivers/mtd/spi-nor/winbond.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 675f32c..c4be225 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -124,6 +124,10 @@ static const struct flash_info winbond_parts[] =3D { { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ) }, + { "w25q512nwm", INFO(0xef8020, 0, 64 * 1024, 1024) + FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) + NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | + SPI_NOR_QUAD_READ) }, { "w25q512jvq", INFO(0xef4020, 0, 64 * 1024, 1024) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, --=20 QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member=20 of Code Aurora Forum, hosted by The Linux Foundation