From nobody Thu Apr 2 20:20:28 2026 Received: from smtp3-g21.free.fr (smtp3-g21.free.fr [212.27.42.3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CB1122C027F for ; Fri, 13 Feb 2026 21:31:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=212.27.42.3 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771018284; cv=none; b=mB6DbONWWT3TmnS6SLT1lJ6qU2AkYKjK5R8BhHFxc5ynrZEDjcVPrSxQlbIpDcxCIgL564gOspSo3yQmCPLRGY8nRLCkccgma8IK5czJFCKT2vtkPmRGodEGy2yWnqbdJlTTmaK3j7sPioQVw7QV/H6n9BfEasUQDclBBK8/AzQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771018284; c=relaxed/simple; bh=GsLww9w5Av/XRiJcde3s9eVaEqzlTFTMtJcW0qKnhv4=; h=Message-ID:Date:MIME-Version:To:Cc:From:Subject:Content-Type; b=FfpO0uNokAL/HTiRIkGPIJvn0obwmqit0XjaBpll45SGq9FW/mkMiwqb5GjuIbmnUhdTvRfHZcMSLJBzYz+Gm+DxlFuVdu0tXV/DZik2UB+c7bb2JZsAPEPym8iRtjrSgA/9LSLp0uvB/ekmGm24gy8QhfY4mIkchqJYwS5eLHU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=free.fr; spf=pass smtp.mailfrom=free.fr; dkim=pass (2048-bit key) header.d=free.fr header.i=@free.fr header.b=l3kBH2+o; arc=none smtp.client-ip=212.27.42.3 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=free.fr Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=free.fr Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=free.fr header.i=@free.fr header.b="l3kBH2+o" Received: from [IPV6:2a02:842a:8223:5500::20] (unknown [IPv6:2a02:842a:8223:5500::20]) (Authenticated sender: julien.robin28@free.fr) by smtp3-g21.free.fr (Postfix) with ESMTPSA id 5AA5713F861; Fri, 13 Feb 2026 22:31:11 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=free.fr; s=smtp-20201208; t=1771018278; bh=GsLww9w5Av/XRiJcde3s9eVaEqzlTFTMtJcW0qKnhv4=; h=Date:To:Cc:From:Subject:From; b=l3kBH2+o9kNmS+Zy+v7bl6oCMBdeanp9vkhrAhs3lt1gICvdwq/A52CmS7moB34W2 Cn2gP1MERGoHc/SuFdpvnT4jY39l3ZahD57Oj02SFmPfqFDmDJl/8HLYXAxlyJZL5s aGXO+ItMgN9eLXriUOnz+ydKzLkY+/uT+araoloD5oytxmSdwWGNs70B9nP8t0tndn 0yq8Qf7LdqBAQD2tIQDpQrDvUG+awNPlp4aZWPghecuyRRipyeyhncVPJvJq8Mhu7U NLkG5CRxUvqCg3Jch8N1c+AOSLbJgmFlw4/68zTTYSyW6/Tx2iRToPu2w8/iefh9yZ 8LJB4T8OBxTLg== Message-ID: <11d024d7-ff66-457c-84f2-da2e88485837@free.fr> Date: Fri, 13 Feb 2026 22:31:11 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: linux-kernel@vger.kernel.org Cc: x86@kernel.org, Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" From: Julien ROBIN Subject: [PATCH v2] x86/pci-dma: swiotlb: Fix a regression since 5.19.0 about iommu=soft kernel parameter Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The following patch fixes a regression introduced since linux-5.19.0 about kernel parameter "iommu=3Dsoft" which, according to kernel-parameters.txt, is expected to enable the use of software bounce buffering (SWIOTLB) and to prevent the usage of an available hardware IOMMU. Since linux-5.19.0 however, iommu=3Dsoft doesn't prevent anymore the usage = of hardware IOMMU implementations, and at least when an AMD GART IOMMU is available, SWIOTLB even gets disabled by "amd_gart_64.c" despite the iommu=3Dsoft parameter. The issue is fixed by adding an "x86_soft_iommu_only" variable which is set when the iommu=3Dsoft parameter is found and processed. If the variable is set, hardware IOMMU detection and allocation is skipped, as these detection and allocation functions could overwrite both x86_init.iommu.iommu_init and x86_platform.iommu_shutdown for later initialization and shutdown of these hardware IOMMU implementations. When the iommu=3Dsoft parameter isn't provided however, the behavior of the kernel is left untouched by this patch. Patch applies from 5.19.0 to 6.19.0, based on mainline as of 2026-02-12. Successfully tested this fix with iommu=3Dsoft parameter on linux-6.1.163 a= nd linux-6.19.0 on a Gigabyte 990FXA-UD3 based computer. Tested the fix and iommu=3Dsoft parameter on linux-6.19 on these 4 machines: - Gigabyte 990FXA-UD3 motherboard based computer (AMD FX9590 CPU) - Asus TUF B550-PLUS motherboard based computer (AMD Ryzen 5 3700X CPU) - HP Victus 16-s1034nf / 8C9C laptop (AMD Ryzen 5 8645HS CPU) - Asus X550JK laptop (Intel Core i5-4200H CPU) On the 1st, this successfully disables AMD GART IOMMU and enables SWIOTLB. On the 2nd, this allows disabling AMD-Vi but SWIOTLB was already enabled. Same for the 3rd one. On the 4th, there was no hardware IOMMU enabled, and SWIOTLB was already enabled too: no resulting change for this laptop. Signed-off-by: Julien ROBIN --- Changes since v1: - Added static keyword to 'x86_soft_iommu_only' (only used locally). --- arch/x86/kernel/pci-dma.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c index 6267363e0189..c4be28de5815 100644 --- a/arch/x86/kernel/pci-dma.c +++ b/arch/x86/kernel/pci-dma.c @@ -34,6 +34,7 @@ int force_iommu __read_mostly =3D 0; int iommu_merge __read_mostly =3D 0; =20 int no_iommu __read_mostly; +static int x86_soft_iommu_only __read_mostly; /* Set this to 1 if there is a HW IOMMU in the system */ int iommu_detected __read_mostly =3D 0; =20 @@ -102,9 +103,15 @@ void __init pci_iommu_alloc(void) return; } pci_swiotlb_detect(); - gart_iommu_hole_init(); - amd_iommu_detect(); - detect_intel_iommu(); + + if (x86_soft_iommu_only) + pr_info("PCI-DMA: skipping hardware IOMMU detection and allocation\n"); + else { + gart_iommu_hole_init(); + amd_iommu_detect(); + detect_intel_iommu(); + } + swiotlb_init(x86_swiotlb_enable, x86_swiotlb_flags); } =20 @@ -151,8 +158,10 @@ static __init int iommu_setup(char *p) return 1; } #ifdef CONFIG_SWIOTLB - if (!strncmp(p, "soft", 4)) + if (!strncmp(p, "soft", 4)) { x86_swiotlb_enable =3D true; + x86_soft_iommu_only =3D 1; + } #endif if (!strncmp(p, "pt", 2)) iommu_set_default_passthrough(true);