From nobody Wed Apr 1 10:33:46 2026 Received: from cstnet.cn (smtp25.cstnet.cn [159.226.251.25]) (using TLSv1.2 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D030D41B349; Tue, 31 Mar 2026 16:28:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=159.226.251.25 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774974496; cv=none; b=AjqbFz1BHV8KfhHAPjtPiSbVZcCEKDk2k+iCHSHtCYUqgZqQTJx1QjRZp+moyTGMv0wjFDgo6FRRPg7GyHHCZY1RA/WQoNmhLJCdouFBRm090DzxKYI4U6Wfi2HEaqKh44bF03tlPsDtnIxNglwAg325DVn5I/+vrdmjVHdjVbs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774974496; c=relaxed/simple; bh=A4itH1QxtQt5JQOB/8NEu+NCqGg/HuSKhjLV7aQvf0o=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Ab7smvlJm3LPd+TRoTEBCxGLdilUbGySQTxtWbYznf6D/dd9+UIh6lfHM8SYGWr3I6QACBjqlg9lKmJ7tu9vRiXYeLF1aOWlYz4cwfxRkTuZE1wwAzM1FpVFmoUGUuJutj7gXyQ+Wm64HyK/yUZzlImfLM6D8nZcf6XbHwclcpI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=iscas.ac.cn; spf=pass smtp.mailfrom=iscas.ac.cn; arc=none smtp.client-ip=159.226.251.25 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=iscas.ac.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=iscas.ac.cn Received: from localhost.localdomain (unknown [223.166.95.230]) by APP-05 (Coremail) with SMTP id zQCowAC3TBAO9stphZUSDA--.56709S5; Wed, 01 Apr 2026 00:28:00 +0800 (CST) From: Han Gao To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Yixun Lan , Chukun Pan Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, linux-kernel@vger.kernel.org, Han Gao , Han Gao Subject: [PATCH v4 3/3] riscv: dts: spacemit: Enable USB3.0/PCIe on OrangePi RV2 Date: Wed, 1 Apr 2026 00:27:56 +0800 Message-ID: <0ec229e2fb138092672773f134d0739e70740ce0.1774974017.git.gaohan@iscas.ac.cn> X-Mailer: git-send-email 2.47.3 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: zQCowAC3TBAO9stphZUSDA--.56709S5 X-Coremail-Antispam: 1UD129KBjvJXoW7uFykZw1rWr1ktr1Duw43GFg_yoW8tF4DpF 17ursI9asxCr4Sg3W3WFyIgF43W3WkG395Zwn8uFW8Jr4kWa4q9rZ3GryfAF95WF48J34Y yF18AFyxGrnrKw7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUmY14x267AKxVWrJVCq3wAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_JrWl82xGYIkIc2 x26xkF7I0E14v26ryj6s0DM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2z4x0 Y4vE2Ix0cI8IcVAFwI0_Gr0_Xr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Cr0_Gr1UM2 8EF7xvwVC2z280aVAFwI0_Gr0_Cr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4j6r4UJwAS 0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2 IY67AKxVWUJVWUGwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0 Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwACI402YVCY1x02628vn2kIc2 xKxwCY1x0262kKe7AKxVWUtVW8ZwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWU JVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67 kF1VAFwI0_Jw0_GFylIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY 6xIIjxv20xvEc7CjxVAFwI0_Cr0_Gr1UMIIF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42 IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6xkF7I0E14v26r4j6r4UJbIYCTnIWIev Ja73UjIFyTuYvjfUO_MaUUUUU X-CM-SenderInfo: xjdrxt3q6l2u1dvotugofq/1tbiCRADDGnL4q42+gAAs0 Content-Type: text/plain; charset="utf-8" Enable the DWC3 USB 3.0 controller and its associated usbphy2 on the OrangePi RV2 board. The board utilizes a Genesys Logic GL3523 USB3.0 hub. Define a 3.3v fixed voltage regulator for PCIe and enable PCIe and PHY-related Device Tree nodes for the OrangePi RV2. Signed-off-by: Han Gao --- .../boot/dts/spacemit/k1-orangepi-rv2.dts | 68 +++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/= boot/dts/spacemit/k1-orangepi-rv2.dts index e5e358d49c09..e93e7f660820 100644 --- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts +++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts @@ -23,6 +23,15 @@ chosen { stdout-path =3D "serial0"; }; =20 + pcie_vcc_3v3: regulator-pcie-vcc3v3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "pcie_vcc3v3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + gpio =3D <&gpio K1_GPIO(116) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + reg_vcc_4v: regulator-vcc-4v { compatible =3D "regulator-fixed"; regulator-name =3D "vcc4v0"; @@ -44,6 +53,10 @@ led1 { }; }; =20 +&combo_phy { + status =3D "okay"; +}; + ð0 { phy-handle =3D <&rgmii0>; phy-mode =3D "rgmii-id"; @@ -190,8 +203,63 @@ dldo6 { }; }; =20 +&pcie1_phy { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pcie1_3_cfg>; + status =3D "okay"; +}; + +&pcie1_port { + phys =3D <&pcie1_phy>; + vpcie3v3-supply =3D <&pcie_vcc_3v3>; +}; + +&pcie1 { + vpcie3v3-supply =3D <&pcie_vcc_3v3>; + status =3D "okay"; +}; + +&pcie2_phy { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pcie2_4_cfg>; + status =3D "okay"; +}; + +&pcie2_port { + phys =3D <&pcie2_phy>; + vpcie3v3-supply =3D <&pcie_vcc_3v3>; +}; + +&pcie2 { + vpcie3v3-supply =3D <&pcie_vcc_3v3>; + status =3D "okay"; +}; + &uart0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&uart0_2_cfg>; status =3D "okay"; }; + +&usbphy2 { + status =3D "okay"; +}; + +&usb_dwc3 { + dr_mode =3D "host"; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + hub_2_0: hub@1 { + compatible =3D "usb5e3,610"; + reg =3D <0x1>; + peer-hub =3D <&hub_3_0>; + }; + + hub_3_0: hub@2 { + compatible =3D "usb5e3,620"; + reg =3D <0x2>; + peer-hub =3D <&hub_2_0>; + }; +}; --=20 2.47.3