From nobody Thu Dec 18 18:51:26 2025 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE24430B505; Mon, 3 Nov 2025 12:18:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762172338; cv=none; b=rSCGvB+PsrU21TOzQiIp3ZOUf4EL3/3/SX2lQqBhlYEBdJU7dHi7Vx8A6FYUNs47xzupJkHPATE/DpVHKR7Ce7a/T2hYnkjkedDa0UCn7y3xU0zuDUEtVBjqqwu8pbfb0cwzQPbIU90TqMUqVMBgbA/6jAlyRA8ZpMydWrPmV9Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762172338; c=relaxed/simple; bh=nrJi0Eh9k7TVEo1mRfMkcAWyeSb8N7d5RRe0lJGNqA0=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=e76ijUJz8WWyPRKTlwK3UTsnjxivhvz4EiIrSGwacYbUl1v566wQfcyBeor2nUnJNYhUQfVM5bVi6aBWV5+/UdKfmSaHuDuMSETEEczvIAqB+opGRfOR9K2esblKA/c6xP8CFefRRAJD+84ZuIu+KvTv3NCGJJuqxCHNBnaOiZw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.98.2) (envelope-from ) id 1vFtWO-000000000oE-2ee0; Mon, 03 Nov 2025 12:18:52 +0000 Date: Mon, 3 Nov 2025 12:18:49 +0000 From: Daniel Golle To: Hauke Mehrtens , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Simon Horman , Russell King , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andreas Schirm , Lukas Stockmann , Alexander Sverdlin , Peter Christen , Avinash Jayaraman , Bing tao Xu , Liang Xu , Juraj Povazanec , "Fanni (Fang-Yi) Chan" , "Benny (Ying-Tsan) Weng" , "Livia M. Rosu" , John Crispin Subject: [PATCH net-next v7 02/12] net: dsa: lantiq_gswip: support enable/disable learning Message-ID: <0aa4621e01c998378ad5812464bc17d23aa3bf62.1762170107.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Switch API 2.2 or later supports enabling or disabling learning on each port. Implement support for BR_LEARNING bridge flag and announce support for BR_LEARNING on GSWIP 2.2 or later. Signed-off-by: Daniel Golle Reviewed-by: Vladimir Oltean --- v7: no changes v6: no changes v5: no changes v4: no changes v3: no changes v2: initialize supported flags with 0 since RFC: no changes drivers/net/dsa/lantiq/lantiq_gswip.h | 3 ++ drivers/net/dsa/lantiq/lantiq_gswip_common.c | 43 ++++++++++++++++++++ 2 files changed, 46 insertions(+) diff --git a/drivers/net/dsa/lantiq/lantiq_gswip.h b/drivers/net/dsa/lantiq= /lantiq_gswip.h index d86290db19b4..fb7d2c02bde9 100644 --- a/drivers/net/dsa/lantiq/lantiq_gswip.h +++ b/drivers/net/dsa/lantiq/lantiq_gswip.h @@ -157,6 +157,9 @@ #define GSWIP_PCE_PCTRL_0_PSTATE_LEARNING 0x3 #define GSWIP_PCE_PCTRL_0_PSTATE_FORWARDING 0x7 #define GSWIP_PCE_PCTRL_0_PSTATE_MASK GENMASK(2, 0) +/* Ethernet Switch PCE Port Control Register 3 */ +#define GSWIP_PCE_PCTRL_3p(p) (0x483 + ((p) * 0xA)) +#define GSWIP_PCE_PCTRL_3_LNDIS BIT(15) /* Learning Disable */ #define GSWIP_PCE_VCTRL(p) (0x485 + ((p) * 0xA)) #define GSWIP_PCE_VCTRL_UVR BIT(0) /* Unknown VLAN Rule */ #define GSWIP_PCE_VCTRL_VINR GENMASK(2, 1) /* VLAN Ingress Tag Rule */ diff --git a/drivers/net/dsa/lantiq/lantiq_gswip_common.c b/drivers/net/dsa= /lantiq/lantiq_gswip_common.c index a0e361622acb..f130bf6642a7 100644 --- a/drivers/net/dsa/lantiq/lantiq_gswip_common.c +++ b/drivers/net/dsa/lantiq/lantiq_gswip_common.c @@ -403,6 +403,47 @@ static int gswip_add_single_port_br(struct gswip_priv = *priv, int port, bool add) return 0; } =20 +static int gswip_port_set_learning(struct gswip_priv *priv, int port, + bool enable) +{ + if (!GSWIP_VERSION_GE(priv, GSWIP_VERSION_2_2)) + return -EOPNOTSUPP; + + /* learning disable bit */ + return regmap_update_bits(priv->gswip, GSWIP_PCE_PCTRL_3p(port), + GSWIP_PCE_PCTRL_3_LNDIS, + enable ? 0 : GSWIP_PCE_PCTRL_3_LNDIS); +} + +static int gswip_port_pre_bridge_flags(struct dsa_switch *ds, int port, + struct switchdev_brport_flags flags, + struct netlink_ext_ack *extack) +{ + struct gswip_priv *priv =3D ds->priv; + unsigned long supported =3D 0; + + if (GSWIP_VERSION_GE(priv, GSWIP_VERSION_2_2)) + supported |=3D BR_LEARNING; + + if (flags.mask & ~supported) + return -EINVAL; + + return 0; +} + +static int gswip_port_bridge_flags(struct dsa_switch *ds, int port, + struct switchdev_brport_flags flags, + struct netlink_ext_ack *extack) +{ + struct gswip_priv *priv =3D ds->priv; + + if (flags.mask & BR_LEARNING) + return gswip_port_set_learning(priv, port, + !!(flags.val & BR_LEARNING)); + + return 0; +} + static int gswip_port_setup(struct dsa_switch *ds, int port) { struct gswip_priv *priv =3D ds->priv; @@ -1521,6 +1562,8 @@ static const struct dsa_switch_ops gswip_switch_ops = =3D { .port_setup =3D gswip_port_setup, .port_enable =3D gswip_port_enable, .port_disable =3D gswip_port_disable, + .port_pre_bridge_flags =3D gswip_port_pre_bridge_flags, + .port_bridge_flags =3D gswip_port_bridge_flags, .port_bridge_join =3D gswip_port_bridge_join, .port_bridge_leave =3D gswip_port_bridge_leave, .port_fast_age =3D gswip_port_fast_age, --=20 2.51.2