From nobody Tue Dec 16 16:41:22 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49AC7EB64DC for ; Thu, 20 Jul 2023 12:29:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230243AbjGTM3H (ORCPT ); Thu, 20 Jul 2023 08:29:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40484 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229922AbjGTM3D (ORCPT ); Thu, 20 Jul 2023 08:29:03 -0400 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4893B26AD for ; Thu, 20 Jul 2023 05:29:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1689856141; x=1721392141; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=IYWaGc7in55gehNCywvpyT3aXhZFWR6R05jqpNlIMdU=; b=Ykh+YyPenLm+1k3SwD/mwlmxTMW2OMLnQm6yng4VpmMGzlJ3JhkIjmcb QlwXtq7kN1pJywOJebevSb+2mb9K1e07xqt4kqFnx6Fcs4M7Kv1vIED+L QgKjYmE1RCiba76U56NTzupytsw6APJpNLzzoJPwk1yLwcfuIumlm8JaN afDWv8PCO1wmFWYkTQLZ7DOBt+dSZMbVi+aJvYAjgWOQdaFmEMGTqUCOi kG8CkHzy7VNxtfqdjNBeuYt3Cxqq8aEVtNM1gBtdcL/LcSSFhGqp/W65w Pfh1Gd8pcivwoWgQq/MByaNs/uMmRo69s5lnPI1tRjIvAqrZp1r3911fM g==; X-IronPort-AV: E=McAfee;i="6600,9927,10776"; a="356677974" X-IronPort-AV: E=Sophos;i="6.01,218,1684825200"; d="scan'208";a="356677974" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jul 2023 05:29:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10776"; a="898255889" X-IronPort-AV: E=Sophos;i="6.01,218,1684825200"; d="scan'208";a="898255889" Received: from moorer9x-mobl.amr.corp.intel.com (HELO khuang2-desk.gar.corp.intel.com) ([10.209.157.3]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jul 2023 05:28:57 -0700 From: Kai Huang To: peterz@infradead.org, kirill.shutemov@linux.intel.com, linux-kernel@vger.kernel.org Cc: dave.hansen@intel.com, tglx@linutronix.de, bp@alien8.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, seanjc@google.com, pbonzini@redhat.com, isaku.yamahata@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, n.borisov.lkml@gmail.com, kai.huang@intel.com Subject: [PATCH v2 03/11] x86/tdx: Make macros of TDCALLs consistent with the spec Date: Fri, 21 Jul 2023 00:28:06 +1200 Message-ID: <09b7da1c3555541ebd28a9675db64fa115f04fe3.1689855280.git.kai.huang@intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The TDX spec names all TDCALLs with prefix "TDG". Currently, the kernel doesn't follow such convention for the macros of those TDCALLs but uses prefix "TDX_" for all of them. Although it's arguable whether the TDX spec names those TDCALLs properly, it's better for the kernel to follow the spec when naming those macros. Change all macros of TDCALLs to make them consistent with the spec. As a bonus, they get distinguished easily from the host-side SEAMCALLs, which all have prefix "TDH". No functional change intended. Signed-off-by: Kai Huang --- v1 -> v2: - Rebase to 6.5-rc2. --- arch/x86/coco/tdx/tdx-shared.c | 4 ++-- arch/x86/coco/tdx/tdx.c | 8 ++++---- arch/x86/include/asm/shared/tdx.h | 10 +++++----- 3 files changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/x86/coco/tdx/tdx-shared.c b/arch/x86/coco/tdx/tdx-shared.c index ef20ddc37b58..f10cd3e4a04e 100644 --- a/arch/x86/coco/tdx/tdx-shared.c +++ b/arch/x86/coco/tdx/tdx-shared.c @@ -35,7 +35,7 @@ static unsigned long try_accept_one(phys_addr_t start, un= signed long len, } =20 tdcall_rcx =3D start | page_size; - if (__tdx_module_call(TDX_ACCEPT_PAGE, tdcall_rcx, 0, 0, 0, NULL)) + if (__tdx_module_call(TDG_MEM_PAGE_ACCEPT, tdcall_rcx, 0, 0, 0, NULL)) return 0; =20 return accept_size; @@ -45,7 +45,7 @@ bool tdx_accept_memory(phys_addr_t start, phys_addr_t end) { /* * For shared->private conversion, accept the page using - * TDX_ACCEPT_PAGE TDX module call. + * TDG_MEM_PAGE_ACCEPT TDX module call. */ while (start < end) { unsigned long len =3D end - start; diff --git a/arch/x86/coco/tdx/tdx.c b/arch/x86/coco/tdx/tdx.c index 1d6b863c42b0..05785df66b1c 100644 --- a/arch/x86/coco/tdx/tdx.c +++ b/arch/x86/coco/tdx/tdx.c @@ -91,7 +91,7 @@ int tdx_mcall_get_report0(u8 *reportdata, u8 *tdreport) { u64 ret; =20 - ret =3D __tdx_module_call(TDX_GET_REPORT, virt_to_phys(tdreport), + ret =3D __tdx_module_call(TDG_MR_REPORT, virt_to_phys(tdreport), virt_to_phys(reportdata), TDREPORT_SUBTYPE_0, 0, NULL); if (ret) { @@ -152,7 +152,7 @@ static void tdx_parse_tdinfo(u64 *cc_mask) * Guest-Host-Communication Interface (GHCI), section 2.4.2 TDCALL * [TDG.VP.INFO]. */ - tdx_module_call(TDX_GET_INFO, 0, 0, 0, 0, &out); + tdx_module_call(TDG_VP_INFO, 0, 0, 0, 0, &out); =20 /* * The highest bit of a guest physical address is the "sharing" bit. @@ -594,7 +594,7 @@ void tdx_get_ve_info(struct ve_info *ve) * Note, the TDX module treats virtual NMIs as inhibited if the #VE * valid flag is set. It means that NMI=3D>#VE will not result in a #DF. */ - tdx_module_call(TDX_GET_VEINFO, 0, 0, 0, 0, &out); + tdx_module_call(TDG_VP_VEINFO_GET, 0, 0, 0, 0, &out); =20 /* Transfer the output parameters */ ve->exit_reason =3D out.rcx; @@ -774,7 +774,7 @@ void __init tdx_early_init(void) cc_set_mask(cc_mask); =20 /* Kernel does not use NOTIFY_ENABLES and does not need random #VEs */ - tdx_module_call(TDX_WR, 0, TDCS_NOTIFY_ENABLES, 0, -1ULL, NULL); + tdx_module_call(TDG_VM_WR, 0, TDCS_NOTIFY_ENABLES, 0, -1ULL, NULL); =20 /* * All bits above GPA width are reserved and kernel treats shared bit diff --git a/arch/x86/include/asm/shared/tdx.h b/arch/x86/include/asm/share= d/tdx.h index 7513b3bb69b7..78f109446da6 100644 --- a/arch/x86/include/asm/shared/tdx.h +++ b/arch/x86/include/asm/shared/tdx.h @@ -11,11 +11,11 @@ #define TDX_IDENT "IntelTDX " =20 /* TDX module Call Leaf IDs */ -#define TDX_GET_INFO 1 -#define TDX_GET_VEINFO 3 -#define TDX_GET_REPORT 4 -#define TDX_ACCEPT_PAGE 6 -#define TDX_WR 8 +#define TDG_VP_INFO 1 +#define TDG_VP_VEINFO_GET 3 +#define TDG_MR_REPORT 4 +#define TDG_MEM_PAGE_ACCEPT 6 +#define TDG_VM_WR 8 =20 /* TDCS fields. To be used by TDG.VM.WR and TDG.VM.RD module calls */ #define TDCS_NOTIFY_ENABLES 0x9100000000000010 --=20 2.41.0