From nobody Tue Apr 7 07:56:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0FA08C4332F for ; Wed, 12 Oct 2022 14:02:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229729AbiJLOCH (ORCPT ); Wed, 12 Oct 2022 10:02:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40334 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229699AbiJLOCC (ORCPT ); Wed, 12 Oct 2022 10:02:02 -0400 Received: from xavier.telenet-ops.be (xavier.telenet-ops.be [IPv6:2a02:1800:120:4::f00:14]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 00B5CC7042 for ; Wed, 12 Oct 2022 07:01:58 -0700 (PDT) Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed50:3da6:62e6:8ab0:ff90]) by xavier.telenet-ops.be with bizsmtp id X21w2800G32x5mf0121woh; Wed, 12 Oct 2022 16:01:57 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1oicJ2-001OY6-Bm; Wed, 12 Oct 2022 16:01:56 +0200 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1oicJ1-00C31z-N6; Wed, 12 Oct 2022 16:01:55 +0200 From: Geert Uytterhoeven To: Krzysztof Kozlowski , Rob Herring , Sergei Shtylyov Cc: Wolfram Sang , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Cong Dang , Hai Pham , Geert Uytterhoeven Subject: [PATCH 1/2] memory: renesas-rpc-if: Clear HS bit during hardware initialization Date: Wed, 12 Oct 2022 16:01:51 +0200 Message-Id: <08d9fb10b3051decebf871267a6e2e7cb2d4faf9.1665583089.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Cong Dang According to the datasheet, HS bit should be specified to 1 when using DMA transfer. As DMA transfer is not supported, it should be cleared to 0. Previously, the driver relied on the HS bit being cleared by prior firmware but this is not always the case. Fix this by ensuring the bit is cleared during hardware initialization. Fixes: ca7d8b980b67f133 ("memory: add Renesas RPC-IF driver") Signed-off-by: Cong Dang Signed-off-by: Hai Pham Signed-off-by: Geert Uytterhoeven Reviewed-by: Wolfram Sang --- drivers/memory/renesas-rpc-if.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/memory/renesas-rpc-if.c b/drivers/memory/renesas-rpc-i= f.c index 4316988d791a527f..61c288d403750b14 100644 --- a/drivers/memory/renesas-rpc-if.c +++ b/drivers/memory/renesas-rpc-if.c @@ -317,6 +317,9 @@ int rpcif_hw_init(struct rpcif *rpc, bool hyperflash) regmap_update_bits(rpc->regmap, RPCIF_PHYCNT, RPCIF_PHYCNT_PHYMEM_MASK, RPCIF_PHYCNT_PHYMEM(hyperflash ? 3 : 0)); =20 + /* DMA Transfer is not supported */ + regmap_update_bits(rpc->regmap, RPCIF_PHYCNT, RPCIF_PHYCNT_HS, 0); + if (rpc->type =3D=3D RPCIF_RCAR_GEN3) regmap_update_bits(rpc->regmap, RPCIF_PHYCNT, RPCIF_PHYCNT_STRTIM(7), RPCIF_PHYCNT_STRTIM(7)); --=20 2.25.1